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VHDL Jobs in San Jose, California, United States

Browse 31 VHDL jobs in San Jose, California, United States on Inference Jobs.

31 jobs
1w agoTenstorrent logoTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100K – $500K Yearly
CPU Engineering
Hardware Engineering
RISC-V
RTL Design
1w agoTenstorrent logoTE

CPU Architect, Load-Store

Tenstorrent

United States (Remote)$100K – $500K Yearly
CPU Architecture
Hardware Engineering
RISC-V
CPU Architecture
4w agoOpenAI logoOP

Design Verification Engineer

OpenAI

San Francisco, California, US or Remote (Worldwide)$226K – $445K Yearly
Hardware Engineering
Design Verification
Design Verification
SystemVerilog
12h agoEtched logoET

RTL Design Engineer

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
RTL Design Engineer
ASIC Design
RTL Design
Digital Logic
12h agoEtched logoET

RTL Intern

Etched

San Jose, California, United States (On-site)
RTL Design
ASIC Engineering
Verilog
SystemVerilog
12h agoEtched logoET

Design Verification Engineer - Internal IP

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
asic
Design Verification
UVM
SystemVerilog
12h agoEtched logoET

Physical Design Engineer

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
Physical Design Engineering
ASIC Design
Physical Design
RTL Synthesis
12h agoEtched logoET

DV Intern

Etched

San Jose, California, United States (On-site)
Design Verification
asic
SystemVerilog
UVM
4w agoCerebras logoCE

Design Verification Engineer- Tile

Cerebras

United States (Remote)$120K – $240K Yearly
Design Verification
Hardware Engineering
SystemVerilog
UVM
2w agoOpenAI logoOP

Hardware Tools Engineer

OpenAI

United States (Remote)$225K – $445K Yearly
Hardware Engineering
Software Engineering
Rust
C++
6d agoCerebras logoCE

AI Silicon Physical Design Engineer

Cerebras

California, United States + 1 more (Remote)$150K – $250K Yearly
Physical Design Engineering
ASIC Design
Physical Design
Physical Verification
12h agoEtched logoET

Design Verification Engineer - SoC

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
design-verification-engineering
ASIC Verification
SystemVerilog
Python
12h agoEtched logoET

Design Verification Engineer - Interface IP

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
design-verification-engineering
ASIC Verification
Design Verification
SystemVerilog
2w agoSambaNova logoSA

Senior Hardware Validation & SI Correlation Engineer

SambaNova

San Jose, California, United States (On-site)$150K – $289K Yearly
Hardware Validation
Signal Integrity Engineering
Signal Integrity
ANSYS HFSS
12h agoEtched logoET

DFT Intern

Etched

San Jose, California, United States (On-site)
DFT Engineering
ASIC Design
DFT
Verilog
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