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SystemVerilog Jobs

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1mo agoNV

Senior Verification Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $218.5K Yearly
Design Verification
ASIC Verification
SystemVerilog
UVM
1mo agoD-

HW Design Verification Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
R&D - HW Verification
Hardware Engineering
UVM
SystemVerilog
3mo agoOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250K – $460K Yearly
Hardware Engineering
RTL Design
Verilog
SystemVerilog
2w agoNV

Senior VLSI CDC Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
ASIC Engineering
VLSI
SystemVerilog
RTL
3mo agoOP

Design Verification Engineer

OpenAI

San Francisco, California, United States (On-site)$310K – $380K Yearly
Hardware Engineering
Design Verification
Design Verification
SystemVerilog
2w agoGR

Director, Silicon Verification

Graphcore

Bristol, England, United Kingdom (Hybrid)
Silicon Verification
ASIC Verification
SystemVerilog
Python
2mo agoCE

Design Verification Engineer- Tile

Cerebras

United States (Remote)$120K – $240K Yearly
Design Verification
Hardware Engineering
SystemVerilog
UVM
3mo agoOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, US$250K – $460K Yearly
Hardware
ASIC Design
Verilog
SystemVerilog