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RTL Design Jobs

Browse 47 RTL Design jobs on Inference Jobs.

47 jobs
12h agoEtched logoET

RTL Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
RTL Design
RTL Development
3w agoTenstorrent logoTE

(India) System IP Design Engineer

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
RISC-V
ASIC Design
RTL Design
Verilog
3w agoEtched logoET

RTL Design Engineer

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
RTL Design Engineer
ASIC Design
RTL Design
Digital Logic
3w agoOpenAI logoOP

Senior RTL Engineer, Interconnect Design

OpenAI

San Francisco, California, United States (Hybrid)$225K – $445K Yearly
RTL Engineering
SoC Design
RTL Design
Verilog
5d agoTenstorrent logoTE

Sr Staff Engineer, SoC RTL Design

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
ASIC Design
Digital Design
RISC-V
SoC Design
4w agoTenstorrent logoTE

Staff Engineer, SoC RTL Engineer

Tenstorrent

Tokyo Prefecture, Japan (Hybrid)
Architecture
RTL Engineering
Verilog
VHDL
4w agoTenstorrent logoTE

Sr. Engineer, CPU RTL Design

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
CPU Design
RTL Design
RISC-V
RTL Design
4w agoTenstorrent logoTE

Sr. Engineer, RTL Implementation

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
RTL Implementation
CPU Design
RTL Coding
Verilog
2w agoNVIDIA logoNV

Chip Design Engineer

NVIDIA

Tel Aviv District, Israel (On-site)
Chip Design
Hardware Engineering
RTL Design
Verification
6d agoGraphcore logoGR

Staff/Principal Logical Design Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
Logical Design
RTL Design
SystemVerilog
VHDL
12h agoEtched logoET

Front-End Power Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
ASIC Design
RTL Design
Verilog
3d agoNVIDIA logoNV

ASIC Design Engineer - Hardware

NVIDIA

Austin, Texas, United States (Hybrid)$116K – $218.5K Yearly
ASIC Design Engineering
Hardware Engineering
RTL Design
Verilog
2w agoNVIDIA logoNV

ASIC Design Engineer, High Speed IO

NVIDIA

Bengaluru, Karnataka, India (On-site)
ASIC Design
RTL Design
RTL Design
UFS
4w agoNeuralink logoNE

Digital IC Design Engineer

Neuralink

Austin, Texas, United States (On-site)$116K – $233.8K Yearly
Brain Interfaces Hardware
Digital IC Design
SystemVerilog
C/C++
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