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Logical Design Jobs

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2w agoNV

Logic Design Engineer, CPU Core

NVIDIA

Yokne'am, Northern District, Israel (On-site)
ASIC Design
Logic Design
Logic Design
Microarchitecture
1mo agoNV

Senior Implementation Methodology Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
Physical Design
VLSI
Logic Design
Physical Design
3w agoNV

DFT Engineer

NVIDIA

Hyderabad, Telangana, India (Hybrid)
DFT Engineering
ASIC Design
Design for Test
Memory BIST
2mo agoNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
VLSI Design
ASIC Design
Verilog
3mo agoD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196K – $300K Yearly
Micro-architecture
RTL Design
Micro-architecture
RTL Design
3w agoET

RTL Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
RTL Design
RTL Development
2mo agoD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180K – $300K Yearly
R&D - HW Silicon Design
ASIC Design
Micro-architecture
RTL Design
3mo agoNV

Senior ASIC Timing Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$168K – $310.5K Yearly
ASIC Engineer
Timing Engineer
Static Timing Analysis (STA)
Physical Design
3mo agoNV

Implementation Methodology Engineer - GPU

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $264.5K Yearly
VLSI Engineering
Hardware Engineering
Synthesis
Formal Equivalence Checking
3mo agoNV

Formal Equivalence Checking Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $264.5K Yearly
VLSI
Hardware Engineering
Verilog
ASIC Design
3mo agoOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, US$250K – $460K Yearly
Hardware
ASIC Design
Verilog
SystemVerilog
4w agoTE

Formal Verification Lead

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
Formal Verification
Design Verification
Formal Verification
Formal Methods