SystemVerilog Assertions Jobs
Browse 40 SystemVerilog Assertions jobs on Inference Jobs.
40 jobs
1wD-
Design Verification Engineer, Senior Staff
d-Matrix
Santa Clara, California, United States (Hybrid)$161.3k – $260k Yearly
1wD-
Design Verification Engineer, Staff
d-Matrix
Santa Clara, California, United States (Hybrid)$161.3k – $260k Yearly
2wNV
Senior Formal Verification Engineer
NVIDIA
Canada, Remote, Canada or Remote (Canada)C$195k – C$245k Yearly
2wNV
3wNV
Senior Formal Verification Engineer
NVIDIA
Myrtle Point, Oregon, United States or Remote (California, United States)$196k – $310.5k Yearly
3wNV
ASIC Verification Engineer - New College Grad 2026
NVIDIA
Austin, Texas, United States (On-site)$100k – $189.8k Yearly
6dTE
Staff Design Verification Engineer, AI HW
Tenstorrent
Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
1wOP
Design Verification Engineer
OpenAI
San Francisco, California, United States (On-site)$310k – $380k Yearly
6dNV
CPU Verification Engineer - New College Grad 2026
NVIDIA
Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
3dNV
Senior Digital Design Verification Engineer - Hardware
NVIDIA
Santa Clara, California, United States (On-site)$136k – $264.5k Yearly
6dTE
Sr. Engineer, SoC Design Verification – AI/ML Accelerator Chiplets
Tenstorrent
Toronto, Ontario, Canada (Hybrid)