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SystemVerilog Assertions Jobs

Browse 38 SystemVerilog Assertions jobs on Inference Jobs.

21-38 of 38 jobs
2w agoNVIDIA logoNV

Senior Verification Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $218.5K Yearly
Design Verification
ASIC Verification
SystemVerilog
UVM
2w agoNVIDIA logoNV

Senior ASIC Design Engineer - Hardware

NVIDIA

Austin, Texas, United States (Hybrid)$136K – $264.5K Yearly
ASIC Design
Hardware Engineering
ASIC Design
System-On-Chip (SOC)
2w agoNVIDIA logoNV

Senior ASIC Verification Engineer

NVIDIA

Beer Sheva, Southern District, Israel (On-site)
ASIC Verification
Hardware Engineering
ASIC Verification
SoC
2w agoNVIDIA logoNV

Senior VLSI CDC Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
ASIC Engineering
VLSI
SystemVerilog
RTL
2w agoTenstorrent logoTE

Staff Design Verification Engineer, AI HW

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100K – $500K Yearly
Design Verification
Hardware Engineering
SystemVerilog
Python
2w agoTenstorrent logoTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
DFT Engineer
ASIC Design
DFT
ATPG
2w agoTenstorrent logoTE

Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
DFT and Test
ASIC Engineering
DFT
RTL
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