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Physical Verification Jobs in San Jose, California, United States

Browse 21 Physical Verification jobs in San Jose, California, United States on Inference Jobs.

21 jobs
14h agoEtched logoET

Design Verification Engineer - Interface IP

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
design-verification-engineering
ASIC Verification
Design Verification
SystemVerilog
4w agoOpenAI logoOP

Design Verification Engineer

OpenAI

San Francisco, California, US or Remote (Worldwide)$226K – $445K Yearly
Hardware Engineering
Design Verification
Design Verification
SystemVerilog
4w agoCerebras logoCE

Design Verification Engineer- Tile

Cerebras

United States (Remote)$120K – $240K Yearly
Design Verification
Hardware Engineering
SystemVerilog
UVM
14h agoEtched logoET

Design Verification Engineer - Internal IP

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
asic
Design Verification
UVM
SystemVerilog
14h agoEtched logoET

Design Verification Engineer - SoC

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
design-verification-engineering
ASIC Verification
SystemVerilog
Python
14h agoEtched logoET

Physical Design Engineer

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
Physical Design Engineering
ASIC Design
Physical Design
RTL Synthesis
6d agoCerebras logoCE

AI Silicon Physical Design Engineer

Cerebras

California, United States + 1 more (Remote)$150K – $250K Yearly
Physical Design Engineering
ASIC Design
Physical Design
Physical Verification
14h agoEtched logoET

DV Intern

Etched

San Jose, California, United States (On-site)
Design Verification
asic
SystemVerilog
UVM
4w agoNVIDIA logoNV

Senior Formal Verification Engineer - LPU

NVIDIA

Worldwide (Remote)
2w agoNVIDIA logoNV

Software Verification Engineer

NVIDIA

Worldwide (Remote)
1w agoTenstorrent logoTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100K – $500K Yearly
CPU Engineering
Hardware Engineering
RISC-V
RTL Design
14h agoEtched logoET

DFT (Design For Test) Engineer

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
DFT Engineering
ASIC Design
DFT
Scan Insertion
14h agoEtched logoET

RTL Intern

Etched

San Jose, California, United States (On-site)
RTL Design
ASIC Engineering
Verilog
SystemVerilog
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