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Temporal Logic Assertions Jobs

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2mo agoNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
VLSI Design
ASIC Design
Verilog
3mo agoNV

Formal Equivalence Checking Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $264.5K Yearly
VLSI
Hardware Engineering
Verilog
ASIC Design
3w agoNV

DFT Engineer

NVIDIA

Hyderabad, Telangana, India (Hybrid)
DFT Engineering
ASIC Design
Design for Test
Memory BIST
2mo agoNV

ASIC RTL Integration and Netlisting Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100K – $189.8K Yearly
ASIC Engineering
Physical Design
ASIC
RTL
1mo agoNV

Senior Implementation Methodology Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
Physical Design
VLSI
Logic Design
Physical Design
3mo agoD-

Design Verification Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$161.3K – $260K Yearly
Design Verification
Hardware Verification
SoC Verification
UVM
2w agoNV

Chip Design Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Chip Design
Hardware Engineering
RTL Design
Verification
2mo agoD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180K – $300K Yearly
R&D - HW Silicon Design
ASIC Design
Micro-architecture
RTL Design
2w agoNV

DFT Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
DFT Engineering
ASIC Design
DFT
Memory BIST