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Temporal Logic Assertions Jobs

Browse 69 Temporal Logic Assertions jobs on Inference Jobs.

41-60 of 69 jobs

1wD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
ASIC Design
CPU Design
2wNV

ASIC Physical Design CAD, Timing Constraint and Analysis

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Engineering
ASIC Physical Design
5dTE

Staff, IP Validation Engineer Lead

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
Electrical Engineering
Hardware Engineering
2wD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180k – $300k Yearly
ASIC Design
Digital IC Design
4wNV

ASIC Timing Engineer

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
ASIC Engineering
Hardware Engineering
3wTE

Silicon Validation Engineer

Tenstorrent

Santa Clara, California, United States (On-site)$100k – $500k Yearly
Electrical Engineering
Hardware Engineering
5dXA

Model Behavior Tutor - Epistemic Rigor & Truthfulness

xAI

United States (Remote)$50 – $70 Hourly
AI Safety
AI Training
2wD-

Principal Design Verification Engineer

d-Matrix

Bengaluru, Karnataka, India (Hybrid)
ASIC Verification
Hardware Verification
5dNV

Senior Timing Methodology Engineer, Custom Circuits

NVIDIA

Santa Clara, California, United States (On-site)$168k – $310.5k Yearly
ASIC Design
Electrical Engineering
5dGR

2026 Graduate Silicon Engineer

Graphcore

Cambridge, England, United Kingdom (On-site)
ASIC Design
Graduate Engineer
4wTE

SoC Physical Design Verification Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
Design Verification
Hardware Engineering
5dTE

Sr. Engineer, SoC Design Verification – AI/ML Accelerator Chiplets

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
ASIC Verification
Design Verification
5dTE

Staff Mixed Signal Design Engineer, Silicon Validation

Tenstorrent

Santa Clara, California, United States (On-site)$100k – $500k Yearly
Electrical Engineering
Hardware Engineering
5dNV

ASIC Design Engineer, BOOT, Functional Safety and Power Management

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
Digital Design
3dNV

Senior AI Verification Chip Design Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
AI Engineering
Chip Design
5dCE

AI Silicon Circuit Simulation Engineer

Cerebras

Sunnyvale, California, United States (On-site)
Analog Design
Circuit Design
2wNV

ASIC Physical Design and Timing Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
ASIC Engineer
ASIC Physical Design Engineer
1wD-

Post-Silicon Validation Engineer, Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$155k – $258k Yearly
ASIC Verification
Embedded Systems
3wAI

Sensor Validation Engineer

Applied Intuition

Sunnyvale, California, United States (On-site)$125k – $222k Yearly
Quality Assurance
Rendering Engineer
2wNV

Senior DFX Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $218.5k Yearly
ASIC Design
DFT Engineer

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Hardware EngineeringASIC DesignSilicon ValidationElectrical EngineeringPhysical DesignTest EngineeringASIC VerificationVLSI DesignASIC EngineeringDesign Verification