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Temporal Logic Assertions Jobs

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3mo agoNV

Implementation Methodology Engineer - GPU

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $264.5K Yearly
VLSI Engineering
Hardware Engineering
Synthesis
Formal Equivalence Checking
2w agoNV

ASIC Verification Engineer

NVIDIA

Hyderabad, Telangana, India (Hybrid)
Verification Engineering
ASIC Design
gdb
VCS
2mo agoNV

ASIC Timing Engineer

NVIDIA

Santa Clara, California, United States (On-site)$116K – $218.5K Yearly
ASIC Engineering
Hardware Engineering
Static Timing Analysis
Timing Convergence
1mo agoTE

Static Timing Analysis (STA) Methodology Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
Physical Design
ASIC Design
Static Timing Analysis (STA)
PrimeTime
5d agoGR

2026 Graduate Silicon Engineer

Graphcore

Cambridge, England, United Kingdom (On-site)
Graduate Engineer
Silicon Engineer
C++
Python
5d agoGR

2026 Graduate Silicon Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
Graduate Hardware Engineer
Silicon Engineer
C++
Python
3w agoET

PCB Hardware Validation Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
Hardware Engineering
PCB
PCIe
3w agoNV

Senior DFT Engineer - Hardware

NVIDIA

Bengaluru, Karnataka, India (On-site)
Hardware Engineering
DFT Engineering
DFT
DFX
2mo agoNV

Senior Timing Methodology Engineer, Custom Circuits

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
Hardware Engineering
ASIC Design
ASIC Design
Timing Analysis
3w agoET

ASIC Timing Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
ASIC Timing
Static Timing Analysis (STA)
2mo agoTE

Silicon Validation Engineer

Tenstorrent

Santa Clara, California, United States (On-site)$100K – $500K Yearly
Silicon Validation
Hardware Engineering
Silicon Validation
Die-to-Die (D2D)
4w agoTE

Staff Mixed Signal Design Engineer, Silicon Validation

Tenstorrent

Santa Clara, California, United States (On-site)$100K – $500K Yearly
Mixed Signal Design
Silicon Validation
Silicon Validation
Mixed Signal Design