Static Timing Analysis (STA) Jobs

Design Methodology

2wNV

Senior ASIC Design and STA Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)

2wNV

ASIC Physical Design CAD, Timing Constraint and Analysis

NVIDIA

Shanghai, Shanghai, China (On-site)

ASIC Physical Design

5dNV

Senior Integration Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)

ASIC Design Engineer

EDA Engineer

4wTE

Chiplet Physical Design Engineer

Tenstorrent

東京都, Tokyo Prefecture, Japan (Hybrid)

ASIC Physical Design Engineer

IC Design

2wNV

ASIC Physical Design and Timing Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly

ASIC Engineer

2wOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly

Hardware

4wNV

ASIC Timing Engineer

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly

5dNV

Senior Timing Methodology Engineer, Custom Circuits

NVIDIA

Santa Clara, California, United States (On-site)$168k – $310.5k Yearly

Physical Design Engineering

Electrical Engineering

3wTE

Physical Design Flow Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly

CAD Engineering

5dTE

Physical Design Engineer - STA

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly

2wNV

Circuit Silicon Correlation DFT Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)

DFT Engineering

1wOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly

Computer Architecture

3dNV

Physical Design Methodology and DevOps Engineer

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly

DevOps

IT Operations

2wNV

Senior DFX Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $218.5k Yearly

DFT Engineer

4wNV

Senior Circuit Design Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168k – $264.5k Yearly

Circuit Design

Digital Design

2wNV

Digital Circuit Design Intern - 2026

NVIDIA

新竹市, Hsinchu City, Taiwan (On-site)

Digital Design Engineer

Engineering Intern

5dNV

Signoff Methodology Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly

Methodology Engineering

4dNV

Senior Custom Silicon Design Engineer

NVIDIA

Shanghai, Shanghai, China (On-site)

3wTE

Staff Engineer, ASIC Design Methodology

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100k – $500k Yearly