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Temporal Logic Assertions Jobs

Browse 69 Temporal Logic Assertions jobs on Inference Jobs.

21-40 of 69 jobs

2wNV

Formal Verification Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Design Verification
Electrical Engineering
1wAN

Staff+ Software Engineer, Databases

Anthropic

San Francisco, California, United States (Hybrid)$405k – $485k Yearly
Backend Engineering
Database Engineering
3wNV

ASIC Verification Engineer - New College Grad 2026

NVIDIA

Austin, Texas, United States (On-site)$100k – $189.8k Yearly
ASIC Design
ASIC Verification
2wNV

Senior ASIC Design Verification Engineer

NVIDIA

Canada, Remote, Canada (Hybrid)C$155k – C$245k Yearly
ASIC Design
ASIC Verification
1dTE

Verification Engineer

Tenstorrent

Japan (Hybrid)
Architecture
ASIC Verification
2wNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
Digital IC Design
1wD-

Design Verification Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$161.3k – $260k Yearly
ASIC Verification
Design Verification
1wGR

Silicon Logical Design Engineer - Bengaluru

Graphcore

Bengaluru, Karnataka, India (On-site)
ASIC Design
Hardware Engineering
4wNV

Formal Equivalence Checking Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Verification
CAD Engineering
4dNV

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Design
ASIC Physical Design
2wNV

Senior HSIO Validation Engineer

NVIDIA

臺北市, Taipei, Taiwan (On-site)
ASIC Verification
Electrical Engineering
2wNV

ASIC RTL Integration and Netlisting Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
ASIC Engineering
Hardware Engineering
1wD-

Design Verification Engineer, Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$161.3k – $260k Yearly
ASIC Verification
Design Verification
2wNV

Circuit Silicon Correlation DFT Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
DFT Engineering
5dTE

Staff/Sr. Staff Engineer, Diagnostic Development

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
ASIC Verification
Diagnostic Engineering
2wOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Hardware
2wNV

Senior Verification Engineer, Chip Design

NVIDIA

Yokne'am, Northern District, Israel (On-site)
ASIC Design
Chip Design
2wNV

Senior ASIC Design and STA Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Engineering
Hardware Engineering
4wNV

Senior RTL Analysis Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Engineering
Hardware Engineering
5dGR

2026 Graduate Silicon Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
ASIC Design
Graduates

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Hardware EngineeringASIC DesignASIC VerificationRTL DesignVLSI DesignDesign VerificationVerification EngineeringASIC EngineeringElectrical EngineeringHardware Verification