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RTL Frontend ASIC Design Jobs

Browse 63 RTL Frontend ASIC Design jobs on Inference Jobs.

41-60 of 63 jobs
2w agoEtched logoET

Front-End Power Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
ASIC Design
RTL Design
Verilog
2w agod-Matrix logoD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180K – $300K Yearly
R&D - HW Silicon Design
ASIC Design
Micro-architecture
RTL Design
2d agoNVIDIA logoNV

Senior Digital Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
Digital Design Engineering
ASIC Design
RTL Design
NVLink
2w agoEtched logoET

Physical Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
Physical Design
Physical Design
ASIC
1w agoTenstorrent logoTE

Sr. Engineer, CPU RTL Design

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
CPU Design
RTL Design
RISC-V
RTL Design
2w agoNVIDIA logoNV

Senior Software Engineer, Hardware Tools and Methodology Development

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $264.5K Yearly
Software Engineer
Senior Software Engineer
C++
Verilog
2w agoNVIDIA logoNV

Senior ASIC Verification Engineer

NVIDIA

Beer Sheva, Southern District, Israel (On-site)
ASIC Verification
Hardware Engineering
ASIC Verification
SoC
5d agoOpenAI logoOP

Physical Design Engineer

OpenAI

San Francisco, California, United States (On-site)$266K – $445K Yearly
Hardware
Physical Design
Physical Design
Silicon Implementation
2w agoNVIDIA logoNV

Senior Systems Prototyping Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
FPGA Engineering
ASIC Engineering
FPGA Prototyping
ASIC Design
2w agoNVIDIA logoNV

DFT Engineer - Hardware

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
DFT Engineer
Hardware Engineer
DFT
RTL Design
2w agoNVIDIA logoNV

Senior Chip Design Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Chip Design
Hardware Engineering
RTL Design
Micro-architecture
2w agoTenstorrent logoTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100K – $500K Yearly
CPU
Hardware Engineering
RISC-V
RTL Design
2w agoTenstorrent logoTE

Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
DFT and Test
ASIC Engineering
DFT
RTL
2w agoNVIDIA logoNV

Chip Design Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Chip Design
Hardware Engineering
RTL Design
Verification
4w agoNeuralink logoNE

Physical Design and Verification Engineer

Neuralink

Austin, Texas, United States (On-site)$158K – $243K Yearly
Physical Design Engineering
ASIC Design
RTL to GDSII
Physical Design
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