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RTL Frontend ASIC Design Jobs

Browse 97 RTL Frontend ASIC Design jobs on Inference Jobs.

21-40 of 97 jobs
5d agoTenstorrent logoTE

Sr Staff Engineer, SoC RTL Design

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
ASIC Design
Digital Design
RISC-V
SoC Design
3d agoNVIDIA logoNV

ASIC Design Engineer - Hardware

NVIDIA

Austin, Texas, United States (Hybrid)$116K – $218.5K Yearly
ASIC Design Engineering
Hardware Engineering
RTL Design
Verilog
3d agoNVIDIA logoNV

Senior Logic Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $264.5K Yearly
Senior Logic Design Engineer
FPGA Design Engineering
FPGA
CPLD
3d agoNVIDIA logoNV

ASIC Clocks Design Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100K – $166.8K Yearly
ASIC Design Engineer
Clock Design Engineer
RTL Design
Verilog
2w agoNVIDIA logoNV

ASIC Design Engineer, High Speed IO

NVIDIA

Bengaluru, Karnataka, India (On-site)
ASIC Design
RTL Design
RTL Design
UFS
3w agoEtched logoET

RTL Intern

Etched

San Jose, California, United States (On-site)
RTL Design
ASIC Engineering
Verilog
SystemVerilog
4w agoNVIDIA logoNV

Senior VLSI Integration Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
VLSI
ASIC Engineering
VLSI
ASIC
3d agoNVIDIA logoNV

Senior ASIC Physical Design Engineer, Netlisting

NVIDIA

Santa Clara, California, United States (Hybrid)$168K – $264.5K Yearly
ASIC Physical Design
Physical Design Engineering
ASIC Physical Design
Netlisting
4w agoNeuralink logoNE

Digital IC Design Engineer

Neuralink

Austin, Texas, United States (On-site)$116K – $233.8K Yearly
Brain Interfaces Hardware
Digital IC Design
SystemVerilog
C/C++
3w agoTenstorrent logoTE

(India) System IP Design Engineer

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
RISC-V
ASIC Design
RTL Design
Verilog
3w agoTenstorrent logoTE

Staff Engineer, SoC RTL Engineer

Tenstorrent

Tokyo Prefecture, Japan (Hybrid)
Architecture
RTL Engineering
Verilog
VHDL
3w agoOpenAI logoOP

Senior RTL Engineer, Interconnect Design

OpenAI

San Francisco, California, United States (Hybrid)$225K – $445K Yearly
RTL Engineering
SoC Design
RTL Design
Verilog
3w agoTenstorrent logoTE

Sr. Engineer, RTL Implementation

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
RTL Implementation
CPU Design
RTL Coding
Verilog
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