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ASIC Verification Jobs in United States

Browse 69 ASIC Verification jobs in United States on Inference Jobs.

21-40 of 69 jobs

2wOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Computer Architecture
4wNV

Research Scientist, AI Accelerator SW HW Co-Design - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$168k – $264.5k Yearly
AI Research
ASIC Engineering
3wNV

Formal Verification Engineer - New College Grad 2026

NVIDIA

Austin, Texas, United States (On-site)$100k – $189.8k Yearly
ASIC Verification
Entry Level Hardware Engineer
2wNV

ASIC Physical Design and Timing Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
ASIC Engineer
ASIC Physical Design Engineer
2wNV

Senior Technical Program Manager – VLSI

NVIDIA

Santa Clara, California, United States (On-site)$168k – $322k Yearly
ASIC Program Manager
Engineering Program Manager
1wTE

Automotive and Robotics SOC Architect

Tenstorrent

North America (Remote)$100k – $500k Yearly
ASIC Design
Automotive Architecture
3wTE

Chiplet Physical Design Engineer

Tenstorrent

United States (Remote)$100k – $500k Yearly
ASIC Design Engineer
Hardware Engineer
2wD-

Post-Silicon Validation Engineer, Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$155k – $258k Yearly
ASIC Verification
Embedded Systems
3wNV

Senior DFX Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $218.5k Yearly
ASIC Design
DFT Engineer
3wD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180k – $300k Yearly
ASIC Design
Digital IC Design
3wNV

Chiplet Physical Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$168k – $310.5k Yearly
ASIC Design Engineer
Chiplet Design
2wOP

ASIC Firmware Engineer, Modeling

OpenAI

San Francisco, California, United States (On-site)$360k – $530k Yearly
ASIC Design
Embedded Systems
3wNV

Product Development Engineer - HBM

NVIDIA

Santa Clara, California, United States (On-site)$168k – $258.8k Yearly
Hardware Engineering
Memory Engineering
1dTE

Network ASIC Designer

Tenstorrent

North America (Remote)$100k – $500k Yearly
Architecture
ASIC Design
2wOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Hardware
3wOP

Electrical Engineer - Systems

OpenAI

San Francisco, California, United States (Hybrid)$295k – $530k Yearly
AI Hardware
Data Center Engineering
1dTE

Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)

Tenstorrent

United States (Remote)$100k – $500k Yearly
ASIC Physical Design
Mixed Signal Design
3wNV

Chip Engineering Operations Program Manager

NVIDIA

Santa Clara, California, United States (On-site)$136k – $258.8k Yearly
Chip Engineering
Engineering Program Manager
2wNV

Senior Large GPU Technologies Architect

NVIDIA

Santa Clara, California, United States (On-site)$196k – $368k Yearly
ASIC Design
Electrical Engineering
4wOP

Power Architect

OpenAI

San Francisco, California, United States (On-site)$295k – $445k Yearly
Chip Design
Electrical Engineering

Related searches

Hardware EngineeringASIC DesignSilicon EngineeringElectrical EngineeringVLSI DesignPhysical Design EngineerSemiconductor EngineeringASIC Design EngineerEmbedded SystemsEngineering Program Manager