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Verilog Jobs in California, United States

Browse 86 Verilog jobs in California, United States on Inference Jobs.

41-60 of 86 jobs
2w agoNVIDIA logoNV

Senior Cache Coherency Architect

NVIDIA

Santa Clara, California, United States (On-site)$184K – $287.5K Yearly
Cache Coherency Architect
Interconnect Architecture
Cache Coherency
AXI
1w agoNVIDIA logoNV

Senior Photonic Device Designer

NVIDIA

Santa Clara, California, United States (On-site)$196K – $310.5K Yearly
Photonic Device Design
Optical Engineer
Silicon Photonics
CMOS
3d agoOpenAI logoOP

Senior RTL Engineer, Interconnect Design

OpenAI

San Francisco, California, United States (Hybrid)$225K – $445K Yearly
RTL Engineering
SoC Design
RTL Design
Verilog
4d agoEtched logoET

ASIC Architect

Etched

San Jose, California, United States (On-site)$200K – $265K Yearly
Architecture
ASIC Architecture
ASIC Design
Computer Architecture
2w agoNVIDIA logoNV

ASIC Physical Design Engineer, Netlisting - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116K – $189.8K Yearly
ASIC Physical Design
RTL Design
ASIC Physical Design
Netlisting
2w agoNVIDIA logoNV

ASIC Verification Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$116K – $218.5K Yearly
ASIC Verification Engineering
Hardware Verification
ASIC Verification
SystemVerilog
1d agoCerebras logoCE

Design Verification Engineer

Cerebras

Sunnyvale, California, United States (On-site)$120K – $240K Yearly
Design Verification
Hardware Engineering
SystemVerilog
UVM
4d agoEtched logoET

Design Verification Engineer - Internal IP

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
ASIC
Design Verification
UVM
SystemVerilog
4d agoEtched logoET

Design Verification Engineer - SoC

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
Design Verification Engineering
ASIC Verification
SystemVerilog
Python
4d agoEtched logoET

DFT (Design For Test) Engineer

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
DFT Engineering
ASIC Design
DFT
Scan Insertion
4d agoEtched logoET

DV Intern

Etched

San Jose, California, United States (On-site)
Design Verification
ASIC
SystemVerilog
UVM
2w agoNVIDIA logoNV

Implementation Methodology Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
VLSI Design
Implementation Engineering
Synthesis
Formal Equivalence Checking
2w agoNVIDIA logoNV

Implementation Methodology Engineer - GPU

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
VLSI Engineering
Hardware Engineering
Synthesis
Formal Equivalence Checking
2w agoNVIDIA logoNV

Offensive Hardware Security Researcher

NVIDIA

Santa Clara, California, United States (On-site)$184K – $356.5K Yearly
Offensive Security Research
Hardware Security Researcher
ARM/RISC-V Assembly
Verilog
1w agoNVIDIA logoNV

Principal GPU Memory Architect

NVIDIA

Santa Clara, California, United States (On-site)$272K – $431.3K Yearly
GPU Architecture
Computer Architecture
GPU Architecture
Memory Systems
2w agoEtched logoET

RTL Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
RTL Design
RTL Development
2w agoNVIDIA logoNV

Senior Power Analysis and Optimization Engineer, AI-LLM Systems

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
Power Analysis Engineer
AI/ML Engineer
Power Analysis
RTL Design
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