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ASIC Verification Jobs in California, United States

Browse 83 ASIC Verification jobs in California, United States on Inference Jobs.

21-40 of 83 jobs
3d agoNVIDIA logoNV

Applied Research Engineer, Chip Design

NVIDIA

Santa Clara, California, United States (Hybrid)$192K – $356.5K Yearly
Applied Research Engineer
AI Chip Design
Large Language Models
ASIC Design
2w agoNVIDIA logoNV

ASIC Clocks Design Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100K – $166.8K Yearly
ASIC Design Engineer
Clock Design Engineer
RTL Design
Verilog
2w agoEtched logoET

ASIC Timing Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
ASIC Timing
Static Timing Analysis (STA)
21h agoCerebras logoCE

Design Verification Engineer

Cerebras

Sunnyvale, California, United States (On-site)$120K – $240K Yearly
Design Verification
Hardware Engineering
SystemVerilog
UVM
3d agoNVIDIA logoNV

Manager, ASIC Chip - GPU

NVIDIA

Santa Clara, California, United States (On-site)$196K – $310.5K Yearly
ASIC Design
GPU Engineering
GPU ASIC Development
RTL Development
4w agoEtched logoET

PCB Hardware Validation Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
Hardware Engineering
PCB
PCIe
3d agoNVIDIA logoNV

Senior ASIC Design Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168K – $310.5K Yearly
ASIC Design
Hardware Engineering
ASIC Design
RTL Design
1w agoNVIDIA logoNV

Senior ASIC Design Engineer - Hardware

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
ASIC Design
Hardware Engineering
ASIC Design
SoC Design
2w agoNVIDIA logoNV

Senior ASIC Front End Infrastructure Engineer

NVIDIA

Santa Clara, California, United States (On-site)$184K – $356.5K Yearly
ASIC Infrastructure Engineering
Hardware Design Infrastructure
Python
Perl
2w agoNVIDIA logoNV

Senior ASIC Timing Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
ASIC Engineering
Hardware Engineering
Static Timing Analysis (STA)
Timing Closure
2w agoNVIDIA logoNV

Senior Digital Design Verification Engineer - Hardware

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
Design Verification
Hardware Engineering
UVM
SystemVerilog
2w agoNVIDIA logoNV

Senior Formal Verification Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168K – $310.5K Yearly
Hardware Engineering
ASIC Verification
Formal Verification
GPU Architectures
2w agoNVIDIA logoNV

Senior Logic Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $264.5K Yearly
Senior Logic Design Engineer
FPGA Design Engineering
FPGA
CPLD
2w agoNVIDIA logoNV

Senior LPU ASIC Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168K – $264.5K Yearly
ASIC Engineering
Physical Design Engineering
Physical Design
ASIC Design
1w agoNVIDIA logoNV

Senior PCIe Post-Silicon Validation Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
Hardware Engineering
Post-Silicon Validation
ASIC
Debussy
1w agoNVIDIA logoNV

Senior Verification Engineer - CPU

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
Hardware Verification
ASIC Verification
SystemVerilog
UVM
2w agoNVIDIA logoNV

Senior Verification Engineer - Hardware

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
Hardware Verification
SoC Verification
C/C++
SystemVerilog
1w agoNVIDIA logoNV

Senior Verification Infrastructure Engineer – NVIDIA SoCs

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
Hardware Engineering
Semiconductor Engineering
SystemVerilog
UVM
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