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ASIC Verification Jobs in California, United States

Browse 25 ASIC Verification jobs in California, United States on Inference Jobs.

25 jobs
2w agod-Matrix logoD-

Design Verification Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$161.3K – $260K Yearly
Design Verification
Hardware Verification
SoC Verification
UVM
2w agoOpenAI logoOP

Design Verification Engineer

OpenAI

San Francisco, California, US or Remote (Worldwide)$226K – $445K Yearly
Hardware Engineering
Design Verification
Design Verification
SystemVerilog
3d agoCerebras logoCE

Sr. Staff/Staff Design Verification Engineer

Cerebras

Sunnyvale, California, United States (On-site)$250K – $300K Yearly
Design Verification
Silicon Engineering
SystemVerilog
UVM
2w agoCerebras logoCE

Design Verification Engineer- Tile

Cerebras

United States (Remote)$120K – $240K Yearly
Design Verification
Hardware Engineering
SystemVerilog
UVM
3w agoEtched logoET

ASIC Timing Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
ASIC Timing
Static Timing Analysis (STA)
3d agoCerebras logoCE

Design Verification Engineer

Cerebras

Sunnyvale, California, United States (On-site)$190K – $230K Yearly
Design Verification
Silicon Engineering
SystemVerilog
UVM
1w agoTenstorrent logoTE

CPU Verification Fellow, RISC-V High-Performance Processor

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
CPU Verification
Design Verification
RISC-V Architecture
SystemVerilog
3w agoEtched logoET

PCB Hardware Validation Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
Hardware Engineering
PCB
PCIe
3w agoCerebras logoCE

3D Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$150K – $270K Yearly
Physical Design
ASIC Design
ASIC Physical Design
SoC Physical Design
3w agoEtched logoET

RTL Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
RTL Design
RTL Development
2w agoNVIDIA logoNV

Senior Formal Verification Engineer - LPU

NVIDIA

Worldwide (Remote)
3w agoEtched logoET

Physical Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
Physical Design
Physical Design
ASIC
2w agod-Matrix logoD-

ASIC Functional Test Engineering Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Hourly
ASIC Functional Test Engineering
Hardware Engineering Intern
Python
Pandas
2w agoOpenAI logoOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$225K – $445K Yearly
Hardware Engineering
RTL Design
Verilog
SystemVerilog
3w agoEtched logoET

Front-End CAD Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
CAD Engineer
Front-End CAD
RTL Simulation
3w agod-Matrix logoD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180K – $300K Yearly
R&D - HW Silicon Design
ASIC Design
Micro-architecture
RTL Design
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