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SystemVerilog RTL Jobs

Browse 106 SystemVerilog RTL jobs on Inference Jobs.

106 jobs

2wOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Hardware
3wTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100k – $500k Yearly
CPU
Digital Design
2wOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Computer Architecture
2wNV

Senior Formal Verification Engineer

NVIDIA

Canada, Remote, Canada or Remote (Canada)C$195k – C$245k Yearly
ASIC Verification
Electrical Engineering
4dGR

DFT Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
ASIC Design
DFT Engineering
5dTE

SoC - Chiplet Design Lead

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
ASIC Design
Chiplet Architecture
1wNV

DFT Verification Engineer

NVIDIA

Yokneam Ilit, Northern District, Israel (On-site)
ASIC Verification
DFT Engineering
1wOP

Design Verification Engineer

OpenAI

San Francisco, California, United States (On-site)$310k – $380k Yearly
ASIC Design
Design Verification
5dNV

Senior ASIC Design Engineer - Hardware

NVIDIA

Austin, Texas, United States (Hybrid)$136k – $264.5k Yearly
ASIC Design
Hardware Engineering
6dTE

Staff Design Verification Engineer, AI HW

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
ASIC Verification
Design Verification
3wNV

Formal Verification Engineer

NVIDIA

Bengaluru, Karnataka, India (On-site)
ASIC Verification Engineer
Design Verification Engineer
6dTE

Staff Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
ASIC Engineering
Design for Test
2wNV

Formal Verification Infra Development Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Verification
Formal Verification
3wNV

Senior Formal Verification Engineer

NVIDIA

Myrtle Point, Oregon, United States or Remote (California, United States)$196k – $310.5k Yearly
ASIC Verification
Design Verification
2wTE

Staff Engineer Design Verification

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
ASIC Verification Engineer
Design Verification Engineer
6dNV

Senior GPU Low Power Architect

NVIDIA

Santa Clara, California, United States (On-site)$136k – $264.5k Yearly
ASIC Engineering
Electrical Engineering
2wNV

Digital Circuit Design Intern - 2026

NVIDIA

新竹市, Hsinchu City, Taiwan (On-site)
Digital Design Engineer
Engineering Intern
1wGR

Silicon Logical Design Engineer - Bengaluru

Graphcore

Bengaluru, Karnataka, India (On-site)
ASIC Design
Hardware Engineering
1wD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
ASIC Design
CPU Design
6dNV

Senior GPU Memory Subsystem Architect

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
GPU Architecture

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Hardware EngineeringASIC DesignRTL DesignSilicon EngineeringASIC VerificationSemiconductor EngineeringVerification EngineeringDesign VerificationElectrical EngineeringFormal Verification