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Pre-Silicon Validation Jobs

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4d agoTE

Senior Physical Design Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
Physical Design
ASIC Engineering
Physical Design
ASIC Design
2mo agoNV

Senior ASIC Methodology Engineer - LPU Division

NVIDIA

United States (Remote)$152K – $287.5K Yearly
ASIC Engineering
Hardware Engineering
ASIC
RTL
4w agoAI

Software Engineer - Validation Toolset

Applied Intuition

Sunnyvale, California, United States (On-site)$125K – $222K Yearly
Software Engineering
Validation Engineering
Python
GoLang
2mo agoNV

Senior SoC Methodology Architect, VLSI Physical Design

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $218.5K Yearly
Physical Design
VLSI Design
SoC Methodology
VLSI Physical Design
2mo agoNV

DFT Verification Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
DFT Engineering
ASIC Verification
DFT
DFT Verification
2mo agoNV

Senior Test Methodology Engineer

NVIDIA

Santa Clara, California, United States (On-site)$132K – $253K Yearly
Test Engineering
Hardware Engineering
ATE Testing
Advantest 93K
3w agoNV

Senior DFT Design Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
DFT Engineering
ASIC Design
DFT
RTL
4w agoFI

Manufacturing Test Engineer, PCBA

Figure

San Jose, California, United States (On-site)$160K – $250K Yearly
Manufacturing Test Engineer
Test Engineer
PCBA
ICT
7d agoD-

Systems Hardware Engineer, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$150K – $300K Yearly
R&D - HW Systems Engineering
Hardware Design Engineering
PCIe Gen5/6
CXL
3mo agoOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, US$250K – $460K Yearly
Hardware
ASIC Design
Verilog
SystemVerilog
2mo agoCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, US$175K – $275K Yearly
ASIC Design
RTL Design
RTL Design
ASIC
2mo agoCE

Advanced Packaging Technologist & Lead

Cerebras

Sunnyvale, California, United States (On-site)$175K – $275K Yearly
Semiconductor Packaging
Advanced Packaging
Semiconductor Packaging
2.5D/3D Stacking
2mo agoNV

Senior Timing Methodology Engineer, Custom Circuits

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
Hardware Engineering
ASIC Design
ASIC Design
Timing Analysis
2mo agoNV

Senior Firmware Engineer - Memory Subsystem

NVIDIA

Santa Clara, California, United States (Hybrid)$184K – $356.5K Yearly
Firmware Engineering
Embedded Systems
Firmware Development
NVLINK-C2C
2mo agoOP

Product Manufacturing Engineer

OpenAI

San Francisco, California, United States (Hybrid)$123K – $285K Yearly
Manufacturing Engineering
Hardware Engineering
PCB
PCBa