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DFT Verification Jobs

Browse 165 DFT Verification jobs on Inference Jobs.

165 jobs

4dNV

DFT Verification Engineer

NVIDIA

臺北市, Taipei, Taiwan (On-site)
ASIC Verification
Design Verification
1wNV

DFT Verification Engineer

NVIDIA

Yokneam Ilit, Northern District, Israel (On-site)
ASIC Verification
DFT Engineering
2wNV

Circuit Silicon Correlation DFT Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
DFT Engineering
7dTE

Staff Engineer, SoC - DFD Design Verification

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100k – $500k Yearly
ASIC Design Verification
DFT Engineering
3wNV

DFT ATPG Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
ASIC Design
DFT Engineering
6dTE

SoC - Chiplet Design Lead

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
ASIC Design
Chiplet Architecture
2wNV

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
ASIC Verification
Design Verification
2wNV

Senior DFX Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $218.5k Yearly
ASIC Design
DFT Engineer
7dGR

2026 Graduate Silicon Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
ASIC Design
Graduates
7dNV

RTL Design Engineer, DFT

NVIDIA

Yokneam Ilit, Northern District, Israel (On-site)
ASIC Design
DFT Engineering
2wNV

Senior ASIC Design Verification Engineer

NVIDIA

Canada, Remote, Canada (Hybrid)C$155k – C$245k Yearly
ASIC Design
ASIC Verification
2wNV

Senior ASIC Design Verification Engineer

NVIDIA

California, United States (Hybrid)$168k – $310.5k Yearly
ASIC Verification
Design Verification
6dNV

Physical Design Engineer

NVIDIA

新竹市, Hsinchu City, Taiwan (On-site)
ASIC Design
Hardware Engineering
3wNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
Digital IC Design
2wCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, United States (Hybrid)$175k – $275k Yearly
ASIC Design
Chip Design
7dTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
DFT Engineer
6dNV

Senior Test Methodology Engineer

NVIDIA

Santa Clara, California, United States (On-site)$132k – $253k Yearly
DFT Engineering
Hardware Engineering
3wTE

Staff Engineer, ASIC Design Methodology

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100k – $500k Yearly
ASIC Design
ASIC Engineering
6dNV

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Design
ASIC Physical Design
7dNV

Senior Bring up Methodology Lead

NVIDIA

Santa Clara, California, United States (Hybrid)$196k – $368k Yearly
Hardware Engineering
NPI Management

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Hardware EngineeringASIC DesignSemiconductor EngineeringDFT EngineeringASIC VerificationDesign VerificationTest EngineeringVLSI DesignRTL DesignSilicon Engineering