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FIRRTL Jobs

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4w agoNVIDIA logoNV

Senior VLSI CDC Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
ASIC Engineering
VLSI
SystemVerilog
RTL
3mo agoOpenAI logoOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, US$250K – $460K Yearly
Hardware
ASIC Design
Verilog
SystemVerilog
4w agoNVIDIA logoNV

Senior Chip Design Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Chip Design
Hardware Engineering
RTL Design
Micro-architecture
3w agoNVIDIA logoNV

Physical Design Engineer

NVIDIA

Hsinchu, Hsinchu City, Taiwan (On-site)
Physical Design
VLSI
VLSI
Physical Design
6d agoNeuralink logoNE

Digital IC Design Engineer Intern

Neuralink

Fremont, California, United States (On-site)$35 – $35 Hourly
Digital IC Design
RTL Design
SystemVerilog
C/C++
1mo agoNVIDIA logoNV

VLSI Integration Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
ASIC Engineering
VLSI Design
ASIC
SOC Design Automation
3mo agoGraphcore logoGR

DFT Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
Engineering - Silicon
DFT Engineering
DFT
JTAG
6d agoNeuralink logoNE

Digital IC Design Engineer

Neuralink

Austin, Texas, United States (On-site)$116K – $233.8K Yearly
Brain Interfaces Hardware
Digital IC Design
SystemVerilog
C/C++
3mo agod-Matrix logoD-

FPGA Design Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$142.5K – $237.5K Yearly
R&D - HW Silicon Design
FPGA Engineering
FPGA Design
FPGA Verification
3mo agoNVIDIA logoNV

Formal Equivalence Checking Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $264.5K Yearly
VLSI
Hardware Engineering
Verilog
ASIC Design
4d agoNVIDIA logoNV

STA Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
STA Engineer
Physical Design Engineer
Static Timing Analysis
DFT
3mo agoOpenAI logoOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250K – $460K Yearly
Hardware Engineering
RTL Design
Verilog
SystemVerilog
3mo agod-Matrix logoD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196K – $300K Yearly
Micro-architecture
RTL Design
Micro-architecture
RTL Design