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SoC Design Jobs in United States

Browse 21 SoC Design jobs in United States on Inference Jobs.

21 jobs
4d agoNVIDIA logoNV

SoC Product Architect Low Power SoC

NVIDIA

Santa Clara, California, United States (On-site)$224K – $431.3K Yearly
SoC Architecture
Product Architecture
SOC Architecture
Low-Power SoC
2w agod-Matrix logoD-

SoC Architect

d-Matrix

Santa Clara, California, United States (Hybrid)$175K – $265K Yearly
SoC Architecture
AI Hardware Architecture
SOC Architecture
AI SoC Architecture
3d agoNVIDIA logoNV

Senior ASIC Design Engineer - Hardware

NVIDIA

Austin, Texas, United States (On-site)$136K – $264.5K Yearly
ASIC Design
Hardware Engineering
ASIC Design
System on Chip (SoC)
4d agoNVIDIA logoNV

SoC Product Architect, Memory Ecosystem

NVIDIA

Santa Clara, California, United States (On-site)$320K – $488.8K Yearly
SoC Architecture
Memory Architecture
DRAM
LPDDR
4d agoNVIDIA logoNV

Senior Platform Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$196K – $310.5K Yearly
Platform Engineering
Hardware Engineering
Board Design
System Design
2w agoTenstorrent logoTE

Physical Design Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
Physical Design Engineer
ASIC Design
Physical Design
ASIC Design
3w agoEtched logoET

Design Verification Engineer - SoC

Etched

Austin, Texas, United States (On-site)$150K – $275K Yearly
ASIC Design Verification
SoC Verification
SystemVerilog
Python
4d agoNVIDIA logoNV

System Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $322K Yearly
Hardware Engineering
Electrical Engineering
GPU
Tegra SoC
3w agoEtched logoET

Design Verification Engineer - SoC

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
Design Verification Engineering
ASIC Verification
SystemVerilog
Python
3w agoOpenAI logoOP

Senior RTL Engineer, Interconnect Design

OpenAI

San Francisco, California, United States (Hybrid)$225K – $445K Yearly
RTL Engineering
SoC Design
RTL Design
Verilog
2w agoTenstorrent logoTE

AI Subsystems Physical Design Lead

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
Physical Design Engineer
ASIC Design
Physical Design
SoC Design
5d agoTenstorrent logoTE

Staff Engineer, SoC - DFD Design Verification

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100K – $500K Yearly
Design Verification
SoC
UVM
DFT
4d agoNVIDIA logoNV

System Design Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$92K – $155.3K Yearly
System Design Engineering
Hardware Engineering
GPU
Tegra SoC
4w agoNeuralink logoNE

Digital IC Design Engineer Intern

Neuralink

Fremont, California, United States (On-site)$35 – $35 Hourly
Digital IC Design
RTL Design
SystemVerilog
C/C++
4d agoNVIDIA logoNV

Senior Design Engineer, Coherent High Speed Interconnect

NVIDIA

Santa Clara, California, United States (On-site)$196K – $310.5K Yearly
Hardware Engineering
ASIC Design
NVLink-C2C
PCIe
4d agoNVIDIA logoNV

Senior ASIC Hardware Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$168K – $264.5K Yearly
ASIC Design Engineering
Hardware Engineering
Verilog
SystemVerilog
3w agod-Matrix logoD-

Design Verification Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$161.3K – $260K Yearly
Design Verification
Hardware Verification
SoC Verification
UVM
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