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Verilog Jobs in United States

Discover Verilog roles in United States on Inference Jobs and apply today.

2mo agoNV

Senior Systems Prototyping Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
FPGA Engineering
ASIC Engineering
FPGA Prototyping
ASIC Design
3mo agoD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196K – $300K Yearly
Micro-architecture
RTL Design
Micro-architecture
RTL Design
2mo agoD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180K – $300K Yearly
R&D - HW Silicon Design
ASIC Design
Micro-architecture
RTL Design
1mo agoCE

Director of Engineering

Cerebras

Sunnyvale, California, United States (Hybrid)$310K – $330K Yearly
Engineering Management
Hardware Engineering
Python
Verilog
3mo agoNV

Formal Equivalence Checking Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $264.5K Yearly
VLSI
Hardware Engineering
Verilog
ASIC Design
1mo agoNV

Senior Software Engineer, Hardware Tools and Methodology Development

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $264.5K Yearly
Software Engineer
Senior Software Engineer
C++
Verilog
2mo agoNV

Senior ASIC Design Engineer - Hardware

NVIDIA

Austin, Texas, United States (Hybrid)$136K – $264.5K Yearly
ASIC Design
Hardware Engineering
ASIC Design
System-On-Chip (SOC)
1mo agoD-

HW Design Verification Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
R&D - HW Verification
Hardware Engineering
UVM
SystemVerilog
3w agoET

Front-End Power Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
ASIC Design
RTL Design
Verilog
3mo agoD-

FPGA Design Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$142.5K – $237.5K Yearly
R&D - HW Silicon Design
FPGA Engineering
FPGA Design
FPGA Verification
2mo agoD-

Analog IC Design Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
Electrical Engineering
Analog IC Design
Analog IC Design
Cadence Virtuoso
3w agoTE

Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
DFT and Test
ASIC Engineering
DFT
RTL
2d agoNE

Analog IC Design and Verification Engineer

Neuralink

Fremont, California, United States (On-site)$125K – $291K Yearly
Analog IC Design
Mixed-Signal Design
CMOS Circuit Design
Mixed-Signal IC Design
1mo agoOP

Hardware Tools Engineer

OpenAI

United States (Remote)$225K – $445K Yearly
Hardware Engineering
Software Engineering
Rust
C++
3mo agoOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250K – $460K Yearly
Hardware Engineering
RTL Design
Verilog
SystemVerilog
2mo agoTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100K – $500K Yearly
CPU
Hardware Engineering
RISC-V
RTL Design
3w agoNV

NVIDIA 2026 Internships: Hardware ASIC Design - US 

NVIDIA

Santa Clara, California, United States (On-site)$20 – $71 Hourly
Hardware Engineering
ASIC Design
SystemVerilog
Verilog