Inference Jobs logo
Inference Jobs
  1. Home
  2. Jobs
  3. Clock Design Engineering

Clock Design Engineering Jobs

Browse 40 Clock Design Engineering jobs on Inference Jobs.

21-40 of 40 jobs
3w agoNVIDIA logoNV

Physical Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$136K – $218.5K Yearly
Physical Design Engineering
Hardware Engineering
VLSI Physical Design
RTL2GDS
5d agoCerebras logoCE

3D Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$150K – $270K Yearly
3D Physical Design
Hardware Engineering
Physical Design
ASIC Design
2w agoNVIDIA logoNV

Senior Hardware SoC Architect

NVIDIA

Santa Clara, California, United States (On-site)$152K – $287.5K Yearly
SoC Architecture
Hardware Engineering
SystemC
C++
1w agoTenstorrent logoTE

Staff Design for Test STA Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
DFT Engineering
STA Engineering
Design for Test
Static Timing Analysis
1w agoEtched logoET

Physical Design Engineer

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
Physical Design Engineering
ASIC Design
Physical Design
RTL Synthesis
3w agoNVIDIA logoNV

Senior LPU ASIC Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168K – $264.5K Yearly
ASIC Engineering
Physical Design Engineering
Physical Design
ASIC Design
2w agoEtched logoET

Front-End Power Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
ASIC Design
RTL Design
Verilog
2w agoEtched logoET

ASIC Timing Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
ASIC Timing
Static Timing Analysis (STA)
3w agoNVIDIA logoNV

DFT Engineer - New College Grad

NVIDIA

Santa Clara, California, United States (On-site)$116K – $218.5K Yearly
DFT Engineer
Design-for-Test Engineering
DFT
Scan Test
2w agoNVIDIA logoNV

Senior DFT Power Methodology Engineer

NVIDIA

Santa Clara, California, United States (On-site)$196K – $310.5K Yearly
DFT Engineering
Power Methodology Engineering
DFT (Design for Test)
Power Analysis
7d agoEtched logoET

PD Intern

Etched

San Jose, California, United States (On-site)
Physical Design
ASIC Design
Physical Design
ASIC Design
3w agoNVIDIA logoNV

Senior ASIC Verification Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168K – $264.5K Yearly
ASIC Verification
Design Verification
SystemVerilog
UVM
2w agoNVIDIA logoNV

Datacenter GPU Power Architect

NVIDIA

Santa Clara, California, United States (On-site)$116K – $189.8K Yearly
Power Architecture
GPU Engineering
Power Estimation
Machine Learning
3w agoNVIDIA logoNV

GPU Power Architect - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100K – $189.8K Yearly
Power Architecture
GPU Engineering
GPU Architecture
Power Estimation
Subscribe to this search

Get email updates when new jobs match this search.