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System-Level Design Verification Jobs

Browse 131 System-Level Design Verification jobs on Inference Jobs.

131 jobs
3d agoTenstorrent logoTE

Senior Engineer, System-Level Design Verification

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100K – $500K Yearly
Hardware Verification Engineering
AI Hardware
RISC-V
AI Silicon
21h agoCerebras logoCE

Design Verification Engineer

Cerebras

Bengaluru, Karnataka, India (On-site)₹8M – ₹11M Yearly
Hardware
Silicon
SystemVerilog
UVM
21h agoCerebras logoCE

Sr. Staff/Staff Design Verification Engineer

Cerebras

Sunnyvale, California, United States (On-site)$250K – $300K Yearly
Hardware Verification Engineering
Design Verification Engineering
SystemVerilog
DPI
21h agoCerebras logoCE

Design Verification Engineer

Cerebras

Sunnyvale, California, United States (On-site)$120K – $240K Yearly
Design Verification
Hardware Engineering
SystemVerilog
UVM
4w agod-Matrix logoD-

Design Verification Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$161.3K – $260K Yearly
Design Verification
Hardware Verification
SoC Verification
UVM
2w agoNVIDIA logoNV

Senior Digital Design Verification Engineer - Hardware

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
Design Verification
Hardware Engineering
UVM
SystemVerilog
13h agoOpenAI logoOP

Design Verification Engineer

OpenAI

San Francisco, California, US or Remote (Worldwide)$226K – $445K Yearly
Hardware Engineering
Design Verification
Design Verification
SystemVerilog
4d agoEtched logoET

Design Verification Engineer - SoC

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
Design Verification Engineering
ASIC Verification
SystemVerilog
Python
4d agoEtched logoET

Design Verification Engineer - SoC

Etched

Austin, Texas, United States (On-site)$150K – $275K Yearly
ASIC Design Verification
SoC Verification
SystemVerilog
Python
2w agoNVIDIA logoNV

Senior ASIC Verification Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168K – $264.5K Yearly
ASIC Verification
Design Verification
SystemVerilog
UVM
1w agoNVIDIA logoNV

ASIC Design Verification Engineer - New College Grad 2026

NVIDIA

Austin, Texas, United States (On-site)$116K – $189.8K Yearly
ASIC Verification
Design Verification
SystemVerilog
UVM
4d agoEtched logoET

Design Verification Engineer - Internal IP

Etched

Austin, Texas, United States (On-site)$150K – $275K Yearly
ASIC
Design Verification
UVM
SystemVerilog
4d agoEtched logoET

Design Verification Engineer - Internal IP

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
ASIC
Design Verification
UVM
SystemVerilog
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