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RTL Debugging Jobs

Browse 215 RTL Debugging jobs on Inference Jobs.

21-40 of 215 jobs

1wNV

DFT Verification Engineer

NVIDIA

Yokneam Ilit, Northern District, Israel (On-site)
ASIC Verification
DFT Engineering
4dTE

Sr. Staff Engineer,Post-Silicon Validation

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
Embedded Systems
Hardware Engineering
6dAI

Senior Embedded Software Engineer - Firmware

Applied Intuition

Mountain View, California, United States (On-site)$171k – $264k Yearly
Embedded Software
Embedded Systems
2wOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Computer Architecture
2wD-

Post-Silicon Validation Engineer, Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$155k – $258k Yearly
ASIC Verification
Embedded Systems
4wNV

Senior RTL Analysis Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Engineering
Hardware Engineering
2wNV

ASIC RTL Integration and Netlisting Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
ASIC Engineering
Hardware Engineering
2wCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, United States (Hybrid)$175k – $275k Yearly
ASIC Design
Chip Design
4wNV

Formal Equivalence Checking Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Verification
CAD Engineering
3wTE

Staff Engineer, ASIC Design Methodology

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100k – $500k Yearly
ASIC Design
ASIC Engineering
2wNV

Lab Technician

NVIDIA

Santa Clara, California, United States (On-site)$60k – $120.8k Yearly
FPGA Engineering
Hardware Engineering
2wNV

Senior Formal Verification Engineer

NVIDIA

Canada, Remote, Canada or Remote (Canada)C$195k – C$245k Yearly
ASIC Verification
Electrical Engineering
3wTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100k – $500k Yearly
CPU
Digital Design
2wD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
ASIC Design
CPU Design
4dNV

DFT Verification Engineer

NVIDIA

臺北市, Taipei, Taiwan (On-site)
ASIC Verification
Design Verification
6dTE

Sr Staff Engineer, SoC RTL Design

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
ASIC Design
Digital Design
4wNV

Senior Physical Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$136k – $264.5k Yearly
ASIC Design
Hardware Engineering
2wNV

Senior Physical Methodology Design Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
Design Methodology
2wGR

Silicon Logical Design Engineer - Bengaluru

Graphcore

Bengaluru, Karnataka, India (On-site)
ASIC Design
Hardware Engineering
3wNV

Senior Formal Verification Engineer

NVIDIA

Myrtle Point, Oregon, United States or Remote (California, United States)$196k – $310.5k Yearly
ASIC Verification
Design Verification

Related searches

Hardware EngineeringASIC DesignRTL DesignASIC VerificationSilicon EngineeringASIC EngineeringEmbedded SystemsFormal VerificationSemiconductor EngineeringVerification Engineering