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Instruction Scheduling Jobs

Browse 112 Instruction Scheduling jobs on Inference Jobs.

81-100 of 112 jobs

2wCE

Performance Engineer - Inference

Cerebras

Toronto, Ontario, Canada (On-site)
AI Infrastructure
High Performance Computing (HPC)
2wTE

CPU Design Verification Technical Lead

Tenstorrent

United States (Hybrid)$100k – $500k Yearly
CPU Verification
Design Verification
4wCE

Senior Runtime Engineer

Cerebras

Sunnyvale, California, United States (On-site)
AI Infrastructure
Backend Engineering
2wNV

Chip Engineering Operations Program Manager

NVIDIA

Santa Clara, California, United States (On-site)$136k – $258.8k Yearly
Chip Engineering
Engineering Program Manager
3dNV

Principal Software Engineer - AI Inference

NVIDIA

Santa Clara, California, United States (On-site)$272k – $431.3k Yearly
AI Engineering
Infrastructure Engineering
2wOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Hardware
6dNV

GPU Compiler LLVM Backend Intern - 2026

NVIDIA

Shanghai, Shanghai, China (On-site)
C++ Development
Compiler Engineering
5dNV

Senior Software Engineer, AI Inference Systems

NVIDIA

Toronto, Ontario, Canada (Hybrid)C$170k – C$275k Yearly
AI Engineering
High-Performance Computing
2wD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
ASIC Design
CPU Design
5dNV

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Design
ASIC Physical Design
5dNV

Senior SoC Power Architect

NVIDIA

Santa Clara, California, United States (On-site)$152k – $287.5k Yearly
Computer Architecture
Electrical Engineering
1dNV

Principal GPU Memory Architect

NVIDIA

Santa Clara, California, United States (On-site)$272k – $431.3k Yearly
Computer Architecture
GPU Architecture
2dTE

Technical Program Manager, RISC-V IP

Tenstorrent

Hybrid$100k – $500k Yearly
Hardware Engineering
Physical Design
2wGR

Silicon Logical Design Engineer - Bengaluru

Graphcore

Bengaluru, Karnataka, India (On-site)
ASIC Design
Hardware Engineering
2wD-

Senior Runtime Software Engineer

d-Matrix

Sydney, New South Wales, Australia (Hybrid)
AI Inference
Embedded Software
2wNV

Senior Deep Learning Performance Architect

NVIDIA

California, United States (Hybrid)$152k – $287.5k Yearly
Deep Learning
GPU Architecture
3dNV

Senior AI Compiler Engineer, MLIR

NVIDIA

Santa Clara, California, United States (On-site)$152k – $241.5k Yearly
AI Engineering
Compiler Engineering
6dTE

Physical Design Engineer - STA

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
ASIC Design
Hardware Engineering
2wD-

ML Compiler Architect, Senior Principal

d-Matrix

Toronto, Ontario, Canada (Hybrid)
Compiler Engineering
Machine Learning Compiler
3dNV

Software Engineer – Hardware Dataflow

NVIDIA

Netherlands (Remote)
Computer Architecture
Embedded Systems

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