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High-level Synthesis Jobs

Browse 60 High-level Synthesis jobs on Inference Jobs.

41-60 of 60 jobs
2w agoNV

Senior Systems Prototyping Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168k – $310.5k Yearly
ASIC Engineering
FPGA Engineering
3w agoGR

DFT Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
ASIC Design
DFT Engineering
3w agoTE

Staff Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
ASIC Engineering
Design for Test
3w agoNV

Senior Integration Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
ASIC Design Engineer
EDA Engineer
3w agoTE

SoC - Chiplet Design Lead

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
ASIC Design
Chiplet Architecture
3w agoOP

Research Engineer / Machine Learning Engineer - B2B Applications

OpenAI

San Francisco, California, United States (On-site)$295k – $445k Yearly
AI Research
Applied AI
3w agoTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
DFT Engineer
3w agoNV

Senior ASIC Design Engineer - Hardware

NVIDIA

Austin, Texas, United States (Hybrid)$136k – $264.5k Yearly
ASIC Design
Hardware Engineering
1w agoNV

Senior STA Engineer, Sub-Chip

NVIDIA

Yokne'am, Northern District, Israel (On-site)
ASIC Design
Hardware Engineering
4w agoDE

Senior Software Engineer, Voice Agent

Decagon

San Francisco, California, United States (On-site)$250k – $330k Yearly
AI Engineering
Backend Development
3w agoTE

Sr. Engineer, Software - Simulation/Hardware Modeling

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
AI Compiler
Computer Architecture
6d agoTE

Sr. Staff Engineer, CPU MidCore RTL Design

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
CPU Design
Hardware Engineering
4w agoGR

Silicon Logical Design Engineer - Bengaluru

Graphcore

Bengaluru, Karnataka, India (On-site)
ASIC Design
Hardware Engineering
2w agoTE

Static Timing Analysis (STA) Methodology Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
ASIC Design
Design Methodology
3w agoTE

Staff Technical Program Manager, Physical Engineering

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
Hardware Engineering
Physical Engineering
4w agoOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Computer Architecture
4w agoD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
ASIC Design
CPU Design
3w agoNV

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Design
ASIC Physical Design
4w agoD-

Analog Design Engineer, Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$155k – $250k Yearly
Analog Design
Hardware Engineering