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Constrained-Random Verification Jobs

Explore Constrained-Random Verification roles on Inference Jobs and apply today.

1mo agoNV

Senior Verification Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $218.5K Yearly
Design Verification
ASIC Verification
SystemVerilog
UVM
2w agoNV

DFT Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
DFT Engineering
ASIC Design
DFT
Memory BIST
6d agoGR

2026 Graduate Silicon Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
Graduate Hardware Engineer
Silicon Engineer
C++
Python
3w agoNV

Senior DFT Engineer - Hardware

NVIDIA

Bengaluru, Karnataka, India (On-site)
Hardware Engineering
DFT Engineering
DFT
DFX
2w agoNV

Verification Engineer - Hardware

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
Hardware Engineering
ASIC Verification
UVM
C++
1mo agoD-

HW Design Verification Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
R&D - HW Verification
Hardware Engineering
UVM
SystemVerilog