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Constrained-Random Verification Jobs

Browse 45 Constrained-Random Verification jobs on Inference Jobs.

45 jobs
2w agoNVIDIA logoNV

Senior Verification Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $218.5K Yearly
Design Verification
ASIC Verification
SystemVerilog
UVM
2w agoTenstorrent logoTE

Formal Verification Lead

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
Formal Verification
Design Verification
Formal Verification
Formal Methods
3d agoNVIDIA logoNV

Formal Verification Engineer - Firmware

NVIDIA

Santa Clara, California, United States (On-site)$116K – $218.5K Yearly
Formal Verification Engineering
Firmware Verification
Formal Verification
Model Checking
4d agoOpenAI logoOP

Design Verification Engineer

OpenAI

San Francisco, California, US or Remote (Worldwide)$226K – $445K Yearly
Hardware Engineering
Design Verification
Design Verification
SystemVerilog
2w agoTenstorrent logoTE

SoC Physical Design Verification Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
Physical Design
Physical Design Verification
SoC Physical Verification
DRC
2d agod-Matrix logoD-

Design Verification Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$161.3K – $260K Yearly
Design Verification
Hardware Verification
SoC Verification
UVM
2w agod-Matrix logoD-

HW Design Verification Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
R&D - HW Verification
Hardware Engineering
UVM
SystemVerilog
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