Clock Design Jobs
Browse 14 Clock Design jobs on Inference Jobs.
14 jobs
4wNV
2wNV
ASIC Clocks Verification Engineer - New College Grad 2026
NVIDIA
Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
2wOP
RTL & Co-design Engineer (junior)
OpenAI
San Francisco, California, United States (Hybrid)$250k – $460k Yearly
2wNV
Chiplet Physical Design Engineer
NVIDIA
Westford, Massachusetts, United States (On-site)$168k – $310.5k Yearly
6dNV
ASIC Design Engineer, Hardware Tools and Methodology Development
NVIDIA
Austin, Texas, United States (Hybrid)$116k – $218.5k Yearly
1wD-
Analog Design Engineer, Senior Staff
d-Matrix
Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
3wTE
SoC Top-Level Physical Design Engineer
Tenstorrent
Austin, Texas, United States (Hybrid)$100k – $500k Yearly
1wD-
Analog Design Engineer, Staff
d-Matrix
Santa Clara, California, United States (Hybrid)$155k – $250k Yearly
5dNV
Senior ASIC Physical Design Engineer, Cache Coherent Interconnects
NVIDIA
Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
4wNV
Senior Circuit Design Engineer
NVIDIA
Santa Clara, California, United States (Hybrid)$168k – $264.5k Yearly
1wNV