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Post-Silicon Validation Jobs

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3w agoTE

Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
DFT and Test
ASIC Engineering
DFT
RTL
2w agoNV

Chip Design Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Chip Design
Hardware Engineering
RTL Design
Verification
2mo agoD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180K – $300K Yearly
R&D - HW Silicon Design
ASIC Design
Micro-architecture
RTL Design
2mo agoNV

Senior Software Engineer, ASIC Design and Verification Tools

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
ASIC Engineering
Software Engineering
C++
Python
2mo agoNV

Senior ASIC Methodology Engineer - LPU Division

NVIDIA

United States (Remote)$152K – $287.5K Yearly
ASIC Engineering
Hardware Engineering
ASIC
RTL
4w agoTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
DFT Engineer
ASIC Design
DFT
ATPG
2mo agoNV

DFT ATPG Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
DFT Engineering
ASIC Design
DFT
ATPG
4d agoTE

Staff Design Verification Engineer, AI HW

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100K – $500K Yearly
Design Verification
Hardware Engineering
SystemVerilog
Python
3mo agoTE

Engineer, PCIe Validation

Tenstorrent

Vancouver, British Columbia, Canada (Hybrid)
Hardware Engineering
Validation Engineering
PCIe
Firmware
1mo agoNV

Senior Verification Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $218.5K Yearly
Design Verification
ASIC Verification
SystemVerilog
UVM