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SystemVerilog Jobs

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1mo agoD-

HW Design Verification Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
R&D - HW Verification
Hardware Engineering
UVM
SystemVerilog
3mo agoD-

Design Verification Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$161.3K – $260K Yearly
Design Verification
Hardware Verification
SoC Verification
UVM
2mo agoNV

Senior ASIC Design Engineer - Hardware

NVIDIA

Austin, Texas, United States (Hybrid)$136K – $264.5K Yearly
ASIC Design
Hardware Engineering
ASIC Design
System-On-Chip (SOC)
3w agoNV

Senior VLSI CDC Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
ASIC Engineering
VLSI
SystemVerilog
RTL
3mo agoOP

Design Verification Engineer

OpenAI

San Francisco, California, United States (On-site)$310K – $380K Yearly
Hardware Engineering
Design Verification
Design Verification
SystemVerilog
2d agoNV

ASIC Verification Engineer - New College Grad 2026

NVIDIA

Durham, North Carolina, United States (On-site)$100K – $189.8K Yearly
ASIC Verification
Hardware Engineering
SystemVerilog
C
9h agoNE

Digital IC Design Engineer Intern

Neuralink

Fremont, California, United States (On-site)$35 – $35 Hourly
Digital IC Design
RTL Design
SystemVerilog
C/C++
2mo agoNV

Senior Verification Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $218.5K Yearly
Design Verification
ASIC Verification
SystemVerilog
UVM