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ASIC Systems Jobs in United States

Browse 75 ASIC Systems jobs in United States on Inference Jobs.

41-60 of 75 jobs
3d agoNVIDIA logoNV

Applied Research Engineer, Chip Design

NVIDIA

Santa Clara, California, United States (Hybrid)$192K – $356.5K Yearly
Applied Research Engineer
AI Chip Design
Large Language Models
ASIC Design
4d agoEtched logoET

DFT Intern

Etched

San Jose, California, United States (On-site)
DFT Engineering
ASIC Design
DFT
Verilog
4d agoEtched logoET

DV Intern

Etched

San Jose, California, United States (On-site)
Design Verification
ASIC
SystemVerilog
UVM
22h agoCerebras logoCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, United States (Hybrid)$175K – $275K Yearly
RTL Design Engineer
Hardware Design Engineer
RTL Design
ASIC Design
2w agoEtched logoET

Physical Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
Physical Design
Physical Design
ASIC
4w agoTenstorrent logoTE

Physical Design Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
Physical Design Engineer
ASIC Design
Physical Design
ASIC Design
4d agoEtched logoET

Post-Silicon Validation Engineer

Etched

San Jose, California, United States (On-site)$160K – $260K Yearly
Post-Silicon Validation Engineering
ASIC Validation
C++
Python
2w agoGraphcore logoGR

Principal Post Silicon Validation Engineer (Bringup)

Graphcore

Austin, Texas, United States (On-site)$241.1K – $326.1K Yearly
Silicon Validation
ASIC Engineering
Post-Silicon Validation
Embedded C
2w agoNVIDIA logoNV

Senior Digital Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
Digital Design Engineering
ASIC Design
RTL Design
NVLink
2w agoNVIDIA logoNV

Senior Logic Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $264.5K Yearly
Senior Logic Design Engineer
FPGA Design Engineering
FPGA
CPLD
1w agoNVIDIA logoNV

Senior Logic Design Engineer, Cache Coherent Interconnects

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
ASIC Design
Hardware Engineering
Verilog
ASIC Design
2w agoNVIDIA logoNV

Senior Physical Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
VLSI Physical Design
ASIC Design
Physical Design
VLSI
4w agoGraphcore logoGR

Senior Post Silicon Validation Engineer (Bringup)

Graphcore

Austin, Texas, United States (On-site)$156.5K – $211.7K Yearly
Silicon Validation
Hardware Engineering
Post-Silicon Validation
C++
22h agoCerebras logoCE

Senior/Staff Engineer : Post Silicon- Bring Up

Cerebras

Sunnyvale, California, United States (On-site)$175K – $275K Yearly
Post-Silicon Engineering
Hardware Engineering
Python
Verilog
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