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SoC Design Jobs in San Jose, California, United States

Browse 16 SoC Design jobs in San Jose, California, United States on Inference Jobs.

16 jobs
2 wk. agoEtched logoET

Design Verification Engineer - SoC

Etched

San Jose, California, United States (On-site)$150–275K Yearly
Design Verification Engineering
ASIC Verification
SystemVerilog
Python
2 wk. agoEtched logoET

RTL Intern

Etched

San Jose, California, United States (On-site)
RTL Design
ASIC Engineering
Verilog
SystemVerilog
2 wk. agoEtched logoET

DFT Intern

Etched

San Jose, California, United States (On-site)
DFT Engineering
ASIC Design
DFT
Verilog
2 wk. agoEtched logoET

DV Intern

Etched

San Jose, California, United States (On-site)
Design Verification
ASIC
SystemVerilog
UVM
2 wk. agoEtched logoET

PD Intern

Etched

San Jose, California, United States (On-site)
Physical Design
ASIC Design
Physical Design
ASIC Design
2 wk. agoEtched logoET

DFT (Design For Test) Engineer

Etched

San Jose, California, United States (On-site)$150–275K Yearly
DFT Engineering
ASIC Design
DFT
Scan Insertion
3 wk. agoTenstorrent logoTE

Fabric SOC Architect

Tenstorrent

United States (Remote)$100–500K Yearly
Architecture
SoC Architecture
NoC
Cache Coherency
5 hr. agoTenstorrent logoTE

Chiplet Design Architect

Tenstorrent

United States (Remote)$100–500K Yearly
CPU Architecture
Chiplet Design
Chiplet Architecture
SOC Architecture
4 wk. agoNVIDIA logoNV

Principal System Architect, GPU

NVIDIA

Santa Clara, California, US or Remote (United States)$272–431.3K Yearly
GPU Architecture
SoC Architecture
GPU Architecture
System-on-Chip (SoC) Development
2 wk. agoOpenAI logoOP

Design Verification Engineer

OpenAI

San Francisco, California, US or Remote (Worldwide)$226–445K Yearly
Hardware Engineering
Design Verification
Design Verification
SystemVerilog
4 wk. agoNVIDIA logoNV

Senior DFT Engineer - LPU

NVIDIA

United States (Remote)$168–264.5K Yearly
DFT Engineer
ASIC Design Engineer
Design-for-Test (DFT)
Scan
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