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ASIC Design Verification Engineer Jobs

Browse 88 ASIC Design Verification Engineer jobs on Inference Jobs.

61-80 of 88 jobs
1w agoNVIDIA logoNV

ASIC Design Engineer - Hardware

NVIDIA

Austin, Texas, United States (Hybrid)$116K – $218.5K Yearly
ASIC Design Engineering
Hardware Engineering
RTL Design
Verilog
1w agoGraphcore logoGR

Director, Silicon Verification

Graphcore

Bristol, England, United Kingdom (Hybrid)
Silicon Verification
ASIC Verification
SystemVerilog
Python
2w agoCerebras logoCE

Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$230K – $280K Yearly
Physical Design
ASIC Physical Design
Physical Design
physical-verification-methodology
1w agoNVIDIA logoNV

ASIC Design Engineer

NVIDIA

Bengaluru, Karnataka, India (On-site)
ASIC Design Engineering
RTL Design
RTL Design
Verilog
1w agoEtched logoET

ASIC Timing Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
ASIC Timing
Static Timing Analysis (STA)
6d agoCerebras logoCE

3D Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$150K – $270K Yearly
Physical Design
ASIC Design
ASIC Physical Design
SoC Physical Design
1w agoTenstorrent logoTE

SoC Physical Design Verification Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
Physical Design
Physical Design Verification
SoC Physical Verification
DRC
1w agoEtched logoET

RTL Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
RTL Design
RTL Development
2w agoGraphcore logoGR

2026 Graduate Silicon Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
Graduate Hardware Engineer
Silicon Engineer
C++
Python
2d agoCerebras logoCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, US$175K – $275K Yearly
ASIC Design
RTL Design
RTL Design
ASIC
1w agoTenstorrent logoTE

Staff Engineer, SoC - DFD Design Verification

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100K – $500K Yearly
Design Verification
SoC
UVM
DFT
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