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Verilog-A Jobs

Browse 57 Verilog-A jobs on Inference Jobs.

21-40 of 57 jobs

3wNV

Low Power ASIC Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
ASIC Engineering
Design Verification
2wOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Hardware
2wCE

Senior/Staff Engineer : Post Silicon- Bring Up

Cerebras

Bengaluru, Karnataka, India (On-site)$175k – $275k Yearly
ASIC Engineering
Hardware Engineering
2wCE

Senior/Staff- Engineer: Post Silicon- Bring Up

Cerebras

Bengaluru, Karnataka, India (On-site)$175k – $275k Yearly
ASIC Engineering
Hardware Engineering
3wNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
Digital IC Design
6dNV

ASIC Design Engineer, Hardware Tools and Methodology Development

NVIDIA

Austin, Texas, United States (Hybrid)$116k – $218.5k Yearly
ASIC Engineering
Digital Design
4dGR

Silicon Verification Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
ASIC Verification
Hardware Verification
1wGR

Silicon Verification Lead

Graphcore

Bristol, England, United Kingdom (On-site)
ASIC Verification
Hardware Verification
2wD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
ASIC Design
CPU Design
2dTE

Verification Engineer

Tenstorrent

Japan (Hybrid)
Architecture
ASIC Verification
2wNV

Senior ASIC Power Engineer

NVIDIA

California, United States (On-site)$136k – $264.5k Yearly
ASIC Engineering
Hardware Engineering
5dTE

SoC - Chiplet Design Lead

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
ASIC Design
Chiplet Architecture
3wNV

Senior Verification Engineer

NVIDIA

Bengaluru, Karnataka, India (On-site)
ASIC Verification
Design Verification
3wNV

Formal Verification Engineer

NVIDIA

Bengaluru, Karnataka, India (On-site)
ASIC Verification Engineer
Design Verification Engineer
2wNV

Senior GPU Floorplan Design Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Physical Design
Floorplanning
6dTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
DFT Engineer
6dTE

Sr Staff Engineer, SoC RTL Design

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
ASIC Design
Digital Design
6dTE

Staff Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
ASIC Engineering
Design for Test
1wNV

DFT Verification Engineer

NVIDIA

Yokneam Ilit, Northern District, Israel (On-site)
ASIC Verification
DFT Engineering
6dNV

Senior GPU Memory Subsystem Architect

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
GPU Architecture

Related searches

Hardware EngineeringASIC DesignASIC EngineeringASIC VerificationSemiconductor EngineeringRTL DesignVLSI DesignVerification EngineeringDesign VerificationDigital Design