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4w agoNVIDIA logoNV

Senior VLSI CDC Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
ASIC Engineering
VLSI
SystemVerilog
RTL
4w agoNVIDIA logoNV

Senior DFT Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
DFT Engineering
ASIC Design Engineer
DFT
RTL Implementation
4w agoNVIDIA logoNV

Physical Design Backend Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Physical Design
Backend Engineering
Physical Design
RTL2GDS
4w agoEtched logoET

Front-End CAD Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
CAD Engineer
Front-End CAD
RTL Simulation
2mo agoNVIDIA logoNV

Manager, Chip Design

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Hardware Engineering
Engineering Management
Verification
RTL Design
2mo agoNVIDIA logoNV

Senior VLSI Integration Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
VLSI
ASIC Engineering
VLSI
ASIC
3mo agoNVIDIA logoNV

Senior ASIC RTL Integration and Netlisting Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
ASIC Design Engineer
Physical Design Engineer
ASIC
RTL Integration
4w agoNVIDIA logoNV

Senior Design-for-Test Engineer, ATPG

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
DFT Engineering
ATPG Engineering
DFT
ATPG
3mo agod-Matrix logoD-

FPGA Design Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$142.5K – $237.5K Yearly
R&D - HW Silicon Design
FPGA Engineering
FPGA Design
FPGA Verification
3w agoGraphcore logoGR

Director, Silicon Verification

Graphcore

Bristol, England, United Kingdom (Hybrid)
Silicon Verification
ASIC Verification
SystemVerilog
Python
6d agoNeuralink logoNE

Analog IC Design and Verification Engineer

Neuralink

Fremont, California, United States (On-site)$125K – $291K Yearly
Analog IC Design
Mixed-Signal Design
CMOS Circuit Design
Mixed-Signal IC Design