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RTL Optimization Jobs

Explore RTL Optimization roles on Inference Jobs and apply today.

2mo agoTenstorrent logoTE

Sr. RTL Design Engineer - Tensix

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
RTL Design
Hardware Engineering
RTL Design
Microarchitecture
1mo agoEtched logoET

RTL Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
RTL Design
RTL Development
4w agoTenstorrent logoTE

Sr Staff Engineer, SoC RTL Design

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
ASIC Design
Digital Design
RISC-V
SoC Design
3mo agoOpenAI logoOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, US$250K – $460K Yearly
Hardware
ASIC Design
Verilog
SystemVerilog
2w agoTenstorrent logoTE

Staff Engineer, SoC RTL Engineer

Tenstorrent

Tokyo Prefecture, Japan (Hybrid)
Architecture
RTL Engineering
Verilog
VHDL
1mo agoEtched logoET

Front-End Power Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
ASIC Design
RTL Design
Verilog
4mo agod-Matrix logoD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196K – $300K Yearly
Micro-architecture
RTL Design
Micro-architecture
RTL Design
3mo agoTenstorrent logoTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100K – $500K Yearly
CPU
Hardware Engineering
RISC-V
RTL Design
3mo agoCerebras logoCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, US$175K – $275K Yearly
ASIC Design
RTL Design
RTL Design
ASIC
3mo agoNVIDIA logoNV

Senior ASIC RTL Integration and Netlisting Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
ASIC Design Engineer
Physical Design Engineer
ASIC
RTL Integration
3mo agoNVIDIA logoNV

ASIC RTL Integration and Netlisting Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100K – $189.8K Yearly
ASIC Engineering
Physical Design
ASIC
RTL
4mo agoOpenAI logoOP

Physical Design Engineer

OpenAI

San Francisco, California, United States (On-site)$310K – $460K Yearly
Hardware
Physical Design
Physical Design
Silicon Implementation
1mo agoNVIDIA logoNV

Senior Chip Design Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Chip Design
Hardware Engineering
RTL Design
Micro-architecture