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RTL/Design Analysis Jobs

Browse 80 RTL/Design Analysis jobs on Inference Jobs.

61-80 of 80 jobs
4 wk. agoNVIDIA logoNV

Principal CPU Power Architect

NVIDIA

Santa Clara, California, United States (On-site)$272–431.3K Yearly
CPU Architecture
Power Architecture
CPU Architecture
RTL Development
3 wk. agoNVIDIA logoNV

Senior DFT Power Methodology Engineer

NVIDIA

Santa Clara, California, United States (On-site)$196–310.5K Yearly
DFT Engineering
Power Methodology Engineering
DFT (Design for Test)
Power Analysis
3 wk. agoNVIDIA logoNV

DFT Engineer

NVIDIA

Hyderabad, Telangana, India (On-site)
DFT Engineering
ASIC Design
Design for Test
Memory BIST
3 wk. agoEtched logoET

ASIC Timing Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
ASIC Timing
Static Timing Analysis (STA)
3 wk. agoNVIDIA logoNV

Senior Hardware Architect

NVIDIA

Yokne'am, Northern District, Israel (On-site)
Hardware Engineering
Silicon Engineering
Chip Design
Microarchitecture
3 wk. agoNVIDIA logoNV

Senior Power Methodology and Modeling Engineer

NVIDIA

Austin, Texas, United States (On-site)$136–264.5K Yearly
Power Engineering
Modeling Engineer
Energy Modeling
Python
4 wk. agoNVIDIA logoNV

DFT Engineer - New College Grad

NVIDIA

Santa Clara, California, United States (On-site)$116–218.5K Yearly
DFT Engineer
Design-for-Test Engineering
DFT
Scan Test
3 wk. agoNVIDIA logoNV

DFT Methodology Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168–264.5K Yearly
DFT Methodology Engineer
Design-for-Test Engineering
DFT
RTL Design
4 wk. agoNVIDIA logoNV

Senior Physical Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168–310.5K Yearly
VLSI Physical Design
ASIC Design
Physical Design
VLSI
6 days agoTenstorrent logoTE

AI Subsystems Physical Design Lead

Tenstorrent

Santa Clara, California, United States (Hybrid)$100–500K Yearly
Physical Design Engineer
ASIC Design
Physical Design
SoC Design
3 wk. agoNVIDIA logoNV

Senior SoC Architect

NVIDIA

Yokne'am, Northern District, Israel (On-site)
SoC Architecture
Hardware Architecture
ASIC Design
Verilog
2 wk. agoEtched logoET

Applied AI Engineer, Silicon Engineering

Etched

San Jose, California, United States (On-site)$150–275K Yearly
Applied AI Engineering
AI Tooling Development
Python
LLM Agents
2 wk. agoEtched logoET

ASIC Architect

Etched

San Jose, California, United States (On-site)$200–265K Yearly
Architecture
ASIC Architecture
ASIC Design
Computer Architecture
4 wk. agoOpenAI logoOP

Technical Deployment Lead, Semiconductors

OpenAI

San Francisco, California, United States (Hybrid)$198–294K Yearly
Technical Program Management
Deployment Engineering
RTL Design
Verification
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