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RTL Constraints Jobs

Explore RTL Constraints roles on Inference Jobs and apply today.

4w agoET

RTL Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
RTL Design
RTL Development
3mo agoOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, US$250K – $460K Yearly
Hardware
ASIC Design
Verilog
SystemVerilog
3mo agoOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250K – $460K Yearly
Hardware Engineering
RTL Design
Verilog
SystemVerilog
1mo agoTE

Sr. RTL Design Engineer - Tensix

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
RTL Design
Hardware Engineering
RTL Design
Microarchitecture
3mo agoD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196K – $300K Yearly
Micro-architecture
RTL Design
Micro-architecture
RTL Design
2mo agoNV

ASIC RTL Integration and Netlisting Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100K – $189.8K Yearly
ASIC Engineering
Physical Design
ASIC
RTL
3mo agoNV

Senior ASIC RTL Integration and Netlisting Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
ASIC Design Engineer
Physical Design Engineer
ASIC
RTL Integration
2mo agoTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100K – $500K Yearly
CPU
Hardware Engineering
RISC-V
RTL Design
1w agoTE

Sr Staff Engineer, SoC RTL Design

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
ASIC Design
Digital Design
RISC-V
SoC Design
2mo agoCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, US$175K – $275K Yearly
ASIC Design
RTL Design
RTL Design
ASIC
3w agoNV

Senior VLSI CDC Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
ASIC Engineering
VLSI
SystemVerilog
RTL
4w agoET

Front-End Power Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
ASIC Design
RTL Design
Verilog
3w agoNV

Senior Design Engineer, Chip Design

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Hardware Engineering
Chip Design
RTL Design
RTL Verification
4w agoET

Front-End CAD Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
CAD Engineer
Front-End CAD
RTL Simulation
2mo agoNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
VLSI Design
ASIC Design
Verilog