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Physical Design Methodologies Jobs

Browse 378 Physical Design Methodologies jobs on Inference Jobs.

21-40 of 378 jobs

6dNV

Signoff Methodology Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
Hardware Engineering
Methodology Engineering
2wNV

Physical Design Power Integrity Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Electrical Engineering
Hardware Engineering
2wNV

Chiplet Physical Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$168k – $310.5k Yearly
ASIC Design Engineer
Chiplet Design
6dCE

AI Silicon Physical Design Engineer

Cerebras

California, United States (Remote)$150k – $250k Yearly
ASIC Design
Physical Design Engineering
1wNV

Senior Software R&D Engineer, VLSI Physical Design

NVIDIA

Santa Clara, California, United States (Hybrid)$168k – $264.5k Yearly
Algorithm Engineer
Physical Design Engineer
4dNV

Senior ASIC Methodology Engineer - LPU Division

NVIDIA

United States (Remote)$152k – $287.5k Yearly
ASIC Engineering
Design Verification
1dNV

Senior ASIC Methodology Engineer - LPU Division

NVIDIA

Canada (Remote)C$135k – C$220k Yearly
AI Hardware
ASIC Design
4wTE

SoC Physical Design Verification Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
Design Verification
Hardware Engineering
2wHA

Director, Product Design

Harvey

New York, New York, United States (On-site)$213k – $288k Yearly
Creative Direction
Design Leadership
6dNV

ASIC Design Engineer, High Speed IO

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
Digital Design
2wNV

Senior GPU Floorplan Design Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Physical Design
Floorplanning
4wNV

Formal Equivalence Checking Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Verification
CAD Engineering
5dTE

SoC - Chiplet Design Lead

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
ASIC Design
Chiplet Architecture
3dD-

Analog IC Design Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
Analog IC Design
Electrical Engineering
6dTE

Staff Design Verification Engineer, AI HW

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
ASIC Verification
Design Verification
6dTE

Formal Verification Lead

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
Design Verification
Electrical Engineering
2wGR

Silicon Logical Design Engineer - Bengaluru

Graphcore

Bengaluru, Karnataka, India (On-site)
ASIC Design
Hardware Engineering
3wNV

Research Scientist, Electronic Design Automation - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$168k – $264.5k Yearly
ASIC Design
Electronic Design Automation (EDA)
6dNV

ASIC Design Engineer, BOOT, Functional Safety and Power Management

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
Digital Design
2wNV

Electronic Design Automation Intern - 2026

NVIDIA

新竹市, Hsinchu City, Taiwan (On-site)
EDA Engineer
Electronic Design Automation Intern

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