On-chip Scan Compression Jobs
Browse 80 On-chip Scan Compression jobs on Inference Jobs.
61-80 of 80 jobs
3wTE
SoC Top-Level Physical Design Engineer
Tenstorrent
Austin, Texas, United States (Hybrid)$100k – $500k Yearly
1wNV
Raytracing Compiler Engineer - Developer and Performance Technology
NVIDIA
Santa Clara, California, United States (On-site)$184k – $356.5k Yearly
1wTE
3wNV
Senior Package Layout Engineer - Hardware
NVIDIA
Santa Clara, California, United States (Hybrid)$136k – $258.8k Yearly
2wNV
GPU Power Architect - New College Grad 2026
NVIDIA
Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
5dNV
Senior Machine Learning Applications and Compiler Engineer
NVIDIA
Cambridge, England, United Kingdom (Hybrid)
2wCE
Senior/Staff Engineer : Post Silicon- Bring Up
Cerebras
Bengaluru, Karnataka, India (On-site)$175k – $275k Yearly
2wD-
Post-Silicon Validation Engineer, Staff
d-Matrix
Santa Clara, California, United States (Hybrid)$155k – $258k Yearly
2wNV
Senior Machine Learning Applications and Compiler Engineer
NVIDIA
Toronto, Ontario, Canada (Hybrid)C$135k – C$220k Yearly
1wAN
Government Incentives & Economic Development Lead
Anthropic
San Francisco, California, United States (Hybrid)$230k – $300k Yearly
2wCE
Senior/Staff- Engineer: Post Silicon- Bring Up
Cerebras
Bengaluru, Karnataka, India (On-site)$175k – $275k Yearly
2wOP
Signal Integrity Engineer
OpenAI
San Francisco, California, United States (Hybrid)$250k – $460k Yearly
5dNV
Senior System Software Engineer - CUDA Chips
NVIDIA
Santa Clara, California, United States (On-site)$152k – $287.5k Yearly