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On-chip Scan Compression Jobs

Browse 63 On-chip Scan Compression jobs on Inference Jobs.

63 jobs

7dNV

Senior DFT ATPG Engineer

NVIDIA

Yokneam Ilit, Northern District, Israel (On-site)
ASIC Design
ATPG Engineering
3wNV

DFT ATPG Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
ASIC Design
DFT Engineering
7dTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
DFT Engineer
7dTE

Staff Engineer, SoC - DFD Design Verification

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100k – $500k Yearly
ASIC Design Verification
DFT Engineering
7dTE

Staff Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
ASIC Engineering
Design for Test
2wCE

Product and Test Engineer

Cerebras

Sunnyvale, California, United States (On-site)$175k – $275k Yearly
Product Engineering
Semiconductor Engineering
5dCE

Advanced Packaging Technologist & Lead

Cerebras

Sunnyvale, California, United States (On-site)$175k – $275k Yearly
Advanced Packaging
Hardware Engineering
6dTE

SoC - Chiplet Design Lead

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
ASIC Design
Chiplet Architecture
4dNV

Senior Machine Learning Engineer, Quantized Inference

NVIDIA

Redmond, Washington, United States (On-site)$152k – $287.5k Yearly
AI Engineer
Deep Learning Engineer
2dNV

Senior Software Engineer, Quantized Inference

NVIDIA

Redmond, Washington, United States (On-site)$152k – $287.5k Yearly
AI Infrastructure
Deep Learning
2wNV

Senior Digital Design Engineer

NVIDIA

Bengaluru, Karnataka, India (On-site)
ASIC Design
Digital Design
7dCE

Senior Research Engineer - Inference ML

Cerebras

Sunnyvale, California, United States (Hybrid)
AI Research Engineer
Deep Learning
2wNV

Principal Digital Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$232k – $368k Yearly
ASIC Engineer
Digital Design Engineer
2wNV

Senior Diagnostic Software Engineer

NVIDIA

Shenzhen Shi, Guangdong, China (On-site)
Diagnostic Engineering
Driver Development
2wNV

Architect - Performance Verification and Analysis

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
Computer Architecture
GPU Architecture
3wNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
Digital IC Design
2dNV

Developer Technology Intern, High-Performance Databases - Summer 2026

NVIDIA

Santa Clara, California, United States (On-site)$20 – $71 Hourly
C++ Development
Database Development
2wNV

Senior Software Engineer, Chip Simulation Infra

NVIDIA

Beer Sheva, Southern District, Israel (Hybrid)
DevOps
Embedded Systems
6dNV

Manager, Chip Design

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
ASIC Design
Chip Design
5dTE

Staff Product Development Engineer - ATE Content Developer

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
DFT
Hardware Engineering

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