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On-chip Scan Compression Jobs

Browse 16 On-chip Scan Compression jobs on Inference Jobs.

16 jobs
6d agoNVIDIA logoNV

DFT Engineer

NVIDIA

Hyderabad, Telangana, India (On-site)
DFT Engineering
ASIC Design
Design for Test
Memory BIST
1w agoNVIDIA logoNV

DFT Engineer - Hardware

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
DFT Engineer
Hardware Engineer
DFT
RTL Design
2d agoEtched logoET

DFT Intern

Etched

San Jose, California, United States (On-site)
DFT Engineering
ASIC Design
DFT
Verilog
6d agoNVIDIA logoNV

Senior DFT ATPG Engineer

NVIDIA

Yokneam, Haifa District, Israel (On-site)
DFT Engineering
ATPG Engineering
DFT
ATPG
4d agoNVIDIA logoNV

DFT ATPG Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
DFT Engineering
ASIC Design
DFT
ATPG
2d agoTenstorrent logoTE

Staff Design for Test STA Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
DFT Engineering
STA Engineering
Design for Test
Static Timing Analysis
2w agoNVIDIA logoNV

Senior DFT Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $264.5K Yearly
DFT Engineering
Test Engineering
DFT
Scan Test Plans
4w agoFigure logoFI

Staff AI Inference and Acceleration Engineer

Figure

San Jose, California, United States (On-site)$180K – $275K Yearly
AI/ML Inference Engineering
Hardware Acceleration
AI/ML Inference
ONNX
2w agoNVIDIA logoNV

Senior DFT Engineer - LPU

NVIDIA

United States (Remote)$168K – $264.5K Yearly
DFT Engineer
ASIC Design Engineer
Design-for-Test (DFT)
Scan
3w agoTenstorrent logoTE

DFT Engineer

Tenstorrent

United States (Remote)$100K – $500K Yearly
DFT Engineer
Design-for-Test Engineering
DFT
Synopsys
2w agoTenstorrent logoTE

Staff Engineer, SoC - DFD Design Verification

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100K – $500K Yearly
Design Verification
SoC
UVM
DFT
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