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Microprocessor Verification Jobs

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2w agoNV

Senior DFT Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
DFT Engineering
ASIC Design Engineer
DFT
RTL Implementation
1mo agoCE

DVT- Technical Lead

Cerebras

Sunnyvale, California, United States (On-site)$175K – $275K Yearly
Electrical Engineering
Hardware Engineering
DVT
Root Cause Analysis
3mo agoTE

Engineer, PCIe Validation

Tenstorrent

Vancouver, British Columbia, Canada (Hybrid)
Hardware Engineering
Validation Engineering
PCIe
Firmware
2mo agoCE

Product and Test Engineer

Cerebras

Sunnyvale, California, United States (On-site)$175K – $275K Yearly
Silicon
Test Engineering
Semiconductor Testing
Wafer-scale Integration
2mo agoNV

Senior ASIC Methodology Engineer - LPU Division

NVIDIA

United States (Remote)$152K – $287.5K Yearly
ASIC Engineering
Hardware Engineering
ASIC
RTL
2mo agoNV

DFT ATPG Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
DFT Engineering
ASIC Design
DFT
ATPG
2w agoNV

Senior Chip Design Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Chip Design
Hardware Engineering
RTL Design
Micro-architecture
2mo agoD-

Analog IC Design Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
Electrical Engineering
Analog IC Design
Analog IC Design
Cadence Virtuoso
4w agoCE

3D Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$150K – $270K Yearly
Physical Design
ASIC Design
ASIC Physical Design
SoC Physical Design
11h agoNV

AI for Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
AI Engineering
Machine Learning Engineering
LangChain
LangGraph
2mo agoAN

Systems Integrity Security Architect

Anthropic

New York, New York, United States (Hybrid)$405K – $485K Yearly
Security
Hardware Security
Firmware Security
Secure Boot
3mo agoTE

Chiplet Physical Design Engineer

Tenstorrent

東京都, Tokyo Prefecture, Japan (Hybrid)
Physical Design
VLSI
Physical Design
Synthesis
2mo agoNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
VLSI Design
ASIC Design
Verilog
3mo agoOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, US$250K – $460K Yearly
Hardware
ASIC Design
Verilog
SystemVerilog
3w agoTE

Technical Program Manager, Architecture

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
Architecture TPM
Technical Program Management
RISC-V
SoC
3mo agoOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250K – $460K Yearly
Hardware Engineering
RTL Design
Verilog
SystemVerilog