Gate Level Verification Jobs
Browse 154 Gate Level Verification jobs on Inference Jobs.
121-140 of 154 jobs
6dNV
2wNV
Chiplet Physical Design Engineer
NVIDIA
Westford, Massachusetts, United States (On-site)$168k – $310.5k Yearly
5dNV
Senior Test Methodology Engineer
NVIDIA
Santa Clara, California, United States (On-site)$132k – $253k Yearly
2wNV
Principal Digital Design Engineer
NVIDIA
Santa Clara, California, United States (On-site)$232k – $368k Yearly
4dTE
Sr. Staff Engineer,Post-Silicon Validation
Tenstorrent
Austin, Texas, United States (Hybrid)$100k – $500k Yearly
3wTE
Silicon Validation Engineer
Tenstorrent
Santa Clara, California, United States (On-site)$100k – $500k Yearly
3dNV
2wNV
Senior High Speed SerDes Validation Engineer
NVIDIA
Santa Clara, California, United States (On-site)$168k – $310.5k Yearly
3wTE
Staff Engineer, ASIC Design Methodology
Tenstorrent
Boston, Massachusetts, United States (Hybrid)$100k – $500k Yearly
4wGR
Principal Post Silicon Lab Characterisation Engineer
Graphcore
Bristol, England, United Kingdom (On-site)
5dNV
Senior ASIC Design Engineer - Hardware
NVIDIA
Austin, Texas, United States (Hybrid)$136k – $264.5k Yearly
4wGR
6dTE
Staff Mixed Signal Design Engineer, Silicon Validation
Tenstorrent
Santa Clara, California, United States (On-site)$100k – $500k Yearly