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Gate Level Verification Jobs

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2mo agoCE

Design Verification Engineer- Tile

Cerebras

United States (Remote)$120K – $240K Yearly
Design Verification
Hardware Engineering
SystemVerilog
UVM
1mo agoCE

Director of Engineering

Cerebras

Sunnyvale, California, United States (Hybrid)$310K – $330K Yearly
Engineering Management
Hardware Engineering
Python
Verilog
3mo agoNV

Senior ASIC RTL Integration and Netlisting Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
ASIC Design Engineer
Physical Design Engineer
ASIC
RTL Integration
2mo agoNV

ASIC RTL Integration and Netlisting Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100K – $189.8K Yearly
ASIC Engineering
Physical Design
ASIC
RTL
1mo agoD-

HW Design Verification Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
R&D - HW Verification
Hardware Engineering
UVM
SystemVerilog
1mo agoNV

Compiler Verification Engineer

NVIDIA

Pune, Maharashtra, India (On-site)
Compiler Engineering
Software Testing
PTX
CUDA
4w agoTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
DFT Engineer
ASIC Design
DFT
ATPG
2mo agoNV

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116K – $218.5K Yearly
ASIC Verification
Hardware Engineering
ASIC
Design Verification
2w agoNV

Verification Engineer - Hardware

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
Hardware Engineering
ASIC Verification
UVM
C++
3w agoNV

SOC Verification Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
Hardware Engineering
ASIC Verification
RTL Design
Verilog