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Digital Logic Design Jobs

Browse 40 Digital Logic Design jobs on Inference Jobs.

21-40 of 40 jobs
2w agoNVIDIA logoNV

ASIC Physical Design Engineer, Netlisting - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116K – $189.8K Yearly
ASIC Physical Design
RTL Design
ASIC Physical Design
Netlisting
2w agoNVIDIA logoNV

Senior ASIC Hardware Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$168K – $264.5K Yearly
ASIC Design Engineering
Hardware Engineering
Verilog
SystemVerilog
3w agoNVIDIA logoNV

Chip Design Engineer

NVIDIA

Tel Aviv District, Israel (On-site)
Chip Design
Hardware Engineering
RTL Design
Verification
2d agoEtched logoET

PD Intern

Etched

San Jose, California, United States (On-site)
Physical Design
ASIC Design
Physical Design
ASIC Design
3d agoEtched logoET

DFT Intern

Etched

San Jose, California, United States (On-site)
DFT Engineering
ASIC Design
DFT
Verilog
7d agoNVIDIA logoNV

Senior ASIC Design Engineer - Hardware

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
ASIC Design
Hardware Engineering
ASIC Design
SoC Design
7d agoNVIDIA logoNV

Senior CPU Design Engineer

NVIDIA

Hillsboro, Oregon, United States (On-site)$168K – $310.5K Yearly
CPU Design
Hardware Engineering
Micro-architecture
RTL Design
3d agoEtched logoET

RTL Design Engineer

Etched

San Jose, California, United States (On-site)$150K – $275K Yearly
RTL Design Engineer
ASIC Design
RTL Design
Digital Logic
2w agoNVIDIA logoNV

Circuit Design Engineer - Standard Cell

NVIDIA

Santa Clara, California, United States (On-site)$116K – $189.8K Yearly
Circuit Design Engineering
VLSI Engineering
Spice Simulation
Standard Cell Circuit Design
3d agoEtched logoET

DV Intern

Etched

San Jose, California, United States (On-site)
Design Verification
ASIC
SystemVerilog
UVM
2w agoNVIDIA logoNV

ASIC Clocks Design Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100K – $166.8K Yearly
ASIC Design Engineer
Clock Design Engineer
RTL Design
Verilog
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