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Chip-Package Co-Design Jobs

Browse 282 Chip-Package Co-Design jobs on Inference Jobs.

41-60 of 282 jobs

4wOP

Power Architect

OpenAI

San Francisco, California, United States (On-site)$295k – $445k Yearly
Chip Design
Electrical Engineering
1wTE

Senior Physical Design Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
ASIC Design
Hardware Engineering
1wCE

3D Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$150k – $270k Yearly
3D Integration
ASIC Design
2wOP

ASIC Firmware Engineer, Modeling

OpenAI

San Francisco, California, United States (On-site)$360k – $530k Yearly
ASIC Design
Embedded Systems
2wCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, United States (Hybrid)$175k – $275k Yearly
ASIC Design
Chip Design
2wNV

Senior Software Engineer, Chip Simulation Infra

NVIDIA

Beer Sheva, Southern District, Israel (Hybrid)
DevOps
Embedded Systems
2wNV

Senior Research Scientist, AI Accelerator Design and VLSI

NVIDIA

Santa Clara, California, United States (On-site)$192k – $356.5k Yearly
AI Hardware
Hardware Engineering
2wNV

Senior Technical Program Manager – VLSI

NVIDIA

Santa Clara, California, United States (On-site)$168k – $322k Yearly
ASIC Program Manager
Engineering Program Manager
28mTE

RTL Engineer, Automotive Robotics

Tenstorrent

Germany (Remote)
ASIC Engineering
Automotive Engineering
2wNV

Software Manager, ITPE

NVIDIA

Yokne'am, Northern District, Israel (On-site)
Engineering Management
Product Development
2wCE

Product and Test Engineer

Cerebras

Sunnyvale, California, United States (On-site)$175k – $275k Yearly
Product Engineering
Semiconductor Engineering
2wOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Computer Architecture
1wTE

Staff Engineer, SoC - DFD Design Verification

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100k – $500k Yearly
ASIC Design Verification
DFT Engineering
3wNV

Senior System Network FW Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168k – $310.5k Yearly
Data Center Engineering
Firmware Engineering
1wNV

Senior Design Optimization Engineer - LPU Packaging

NVIDIA

Santa Clara, California, United States (Hybrid)$184k – $345k Yearly
Design Engineering
Mechanical Engineering
2dNV

ASIC Floorplan Design Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
ASIC Design Engineer
Entry Level Hardware Engineer
2wNV

Senior Custom SOC IP Verification Engineer

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Verification
Design Verification
5dNV

Senior Reliability Engineer - LPU Packaging

NVIDIA

Santa Clara, California, United States (On-site)$168k – $310.5k Yearly
Hardware Engineering
Packaging Engineering
2wNV

Senior NPI Engineer, Chip

NVIDIA

Yokne'am, Northern District, Israel (On-site)
Hardware Engineering
NPI Engineering
1wXA

Summer 2026 Engineering Internship/Co-op

xAI

Memphis, Tennessee, United States (On-site)
Controls Engineering
Data Center Operations

Related searches

Hardware EngineeringASIC DesignSemiconductor EngineeringSilicon EngineeringEmbedded SystemsRTL DesignTest EngineeringChip DesignElectrical EngineeringFirmware Engineering