Chip-Package Co-Design Jobs
Browse 284 Chip-Package Co-Design jobs on Inference Jobs.
21-40 of 284 jobs
1wNV
Senior System Co-Design Engineer - Speed and Reliability
NVIDIA
Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
2wNV
Principal System Architect, GPU
NVIDIA
Santa Clara, California, United States (On-site)$272k – $431.3k Yearly
2wOP
RTL & Co-design Engineer (junior)
OpenAI
San Francisco, California, United States (Hybrid)$250k – $460k Yearly
2wNV
3dNV
Client Platform Architect
NVIDIA
Santa Clara, California, United States (On-site)$224k – $356.5k Yearly
4wNV
Research Scientist, AI Accelerator SW HW Co-Design - New College Grad 2026
NVIDIA
Santa Clara, California, United States (On-site)$168k – $264.5k Yearly
5dNV
7dNV
Senior ASIC Design Engineer - Hardware
NVIDIA
Austin, Texas, United States (Hybrid)$136k – $264.5k Yearly
2wOP
Reliability/DFX Engineer
OpenAI
San Francisco, California, United States (On-site)$285k – $460k Yearly
2wOP
Signal Integrity Engineer
OpenAI
San Francisco, California, United States (Hybrid)$250k – $460k Yearly
2wNV
Principal Digital Design Engineer
NVIDIA
Santa Clara, California, United States (On-site)$232k – $368k Yearly
1wNV
ASIC Design Engineer, BOOT, Functional Safety and Power Management
NVIDIA
Bengaluru, Karnataka, India (Hybrid)