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Chip Design Verification Jobs

Explore Chip Design Verification roles on Inference Jobs and apply today.

4w agoTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
DFT Engineer
ASIC Design
DFT
ATPG
2w agoNV

DFT Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
DFT Engineering
ASIC Design
DFT
Memory BIST
3w agoET

PCB Hardware Validation Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
Hardware Engineering
PCB
PCIe
3w agoGR

Senior SoC Architect

Graphcore

Bristol, England, United Kingdom (On-site)
Silicon Architecture
SoC Architecture
SoC Architecture
Semiconductor
2w agoNV

Senior Physical Design Backend Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Physical Design
Backend Engineering
Physical Design
RTL2GDS
2w agoNV

Senior Design-for-Test Engineer, ATPG

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
DFT Engineering
ATPG Engineering
DFT
ATPG
2mo agoNV

Physical Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$116K – $218.5K Yearly
Physical Design Engineering
Hardware Engineering
Physical Design
VLSI
2mo agoTE

Chiplet Physical Design Engineer

Tenstorrent

東京都, Tokyo Prefecture, Japan (Hybrid)
Physical Design
VLSI
Physical Design
Synthesis
2mo agoNV

Senior Performance Verification Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
Hardware Engineering
CPU Verification
CPU Performance Verification
Performance Correlation
3w agoET

RTL Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
RTL Design
RTL Development
3w agoGR

SoC Architect

Graphcore

Bristol, England, United Kingdom (On-site)
Silicon Architecture
SoC Design
SoC Architecture
RTL Development
2w agoNV

Senior Chip Design Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
ASIC Design
Hardware Engineering
ASIC Design
Pre-Silicon Design
3w agoNV

DFT Engineer

NVIDIA

Hyderabad, Telangana, India (Hybrid)
DFT Engineering
ASIC Design
Design for Test
Memory BIST
2mo agoNV

Senior SoC Methodology Architect, VLSI Physical Design

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $218.5K Yearly
Physical Design
VLSI Design
SoC Methodology
VLSI Physical Design
2w agoNV

Logic Design Engineer, CPU Core

NVIDIA

Yokne'am, Northern District, Israel (On-site)
ASIC Design
Logic Design
Logic Design
Microarchitecture